Merge branch 'master' of git://git.denx.de/u-boot-fdt

diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c
index e53ead04fdf49fe38479d0c3694763346aaf1e32..9bef92e8155603e6252317cd1d41015b397f0367 100644 (file)
--- a/board/freescale/common/sys_eeprom.c
+++ b/board/freescale/common/sys_eeprom.c
@@ -463,6 +463,6 @@ unsigned int get_cpu_board_revision(void)
        if ((be.major == 0xff) && (be.minor == 0xff))
                return MPC85XX_CPU_BOARD_REV(0, 0);
 
-       return MPC85XX_CPU_BOARD_REV(e.major, e.minor);
+       return MPC85XX_CPU_BOARD_REV(be.major, be.minor);
 }
 #endif

diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c
index 3a6347fe1a5533ae38ada6af28dcd16677b28e99..128cd40575d381cd5eb896a7cda8fb01c02571e4 100644 (file)
--- a/board/freescale/mpc8313erdb/sdram.c
+++ b/board/freescale/mpc8313erdb/sdram.c
@@ -64,7 +64,7 @@ static long fixed_sdram(void)
        volatile immap_t *im = (volatile immap_t *)CFG_IMMR;
        u32 msize_log2 = __ilog2(msize);
 
-       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12;
+       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
        im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
        im->sysconf.ddrcdr = CFG_DDRCDR_VALUE;
 

diff --git a/board/freescale/mpc8315erdb/sdram.c b/board/freescale/mpc8315erdb/sdram.c
index 07e6486eeac019a115b8708be03e127022669f4e..3714c2c2eff4095818ec99d86588e0a056a1208c 100644 (file)
--- a/board/freescale/mpc8315erdb/sdram.c
+++ b/board/freescale/mpc8315erdb/sdram.c
@@ -60,7 +60,7 @@ static long fixed_sdram(void)
        u32 msize = CFG_DDR_SIZE * 1024 * 1024;
        u32 msize_log2 = __ilog2(msize);
 
-       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12;
+       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE  & 0xfffff000;
        im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
        im->sysconf.ddrcdr = CFG_DDRCDR_VALUE;
 

diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c
index 4c04f2c4dda1f46aeb56de255bc731fe62f92f12..ef947feda1dae63afb7a3a2845ff3d21c2ef275e 100644 (file)
--- a/board/freescale/mpc8349emds/mpc8349emds.c
+++ b/board/freescale/mpc8349emds/mpc8349emds.c
@@ -109,7 +109,7 @@ int fixed_sdram(void)
                        return -1;
                }
        }
-       im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff);
+       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
        im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
 
 #if (CFG_DDR_SIZE != 256)

diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c
index d3fc560df3586f6c5465741ebaa8d196287ccbcd..0a20e2bba4019d215e7c92ebf34abe7b18ca5154 100644 (file)
--- a/board/freescale/mpc8349itx/mpc8349itx.c
+++ b/board/freescale/mpc8349itx/mpc8349itx.c
@@ -55,7 +55,7 @@ int fixed_sdram(void)
 
        im->sysconf.ddrlaw[0].ar =
            LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
-       im->sysconf.ddrlaw[0].bar = (CFG_DDR_SDRAM_BASE >> 12) & 0xfffff;
+       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
 
        /* Only one CS0 for DDR */
        im->ddr.csbnds[0].csbnds = 0x0000000f;

diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c
index 40f1e63281d5a2992da2f349eeb4bd43e1e3eb4b..8003ec1d973ebd3011f8134276c6892b3ccded2c 100644 (file)
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -108,7 +108,7 @@ int fixed_sdram(void)
        u32 msize = CFG_DDR_SIZE * 1024 * 1024;
        u32 msize_log2 = __ilog2(msize);
 
-       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12;
+       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
        im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
 
 #if (CFG_DDR_SIZE != 512)

diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index aaefc189913e4bb4c29238bcfd72ad59014ca652..e547b51e3065edd14bbe456997e5ebe35f1d0560 100644 (file)
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -96,7 +96,7 @@ int fixed_sdram(void)
        u32 msize = CFG_DDR_SIZE * 1024 * 1024;
        u32 msize_log2 = __ilog2(msize);
 
-       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12;
+       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
        im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
 
        im->sysconf.ddrcdr = CFG_DDRCDR_VALUE;

diff --git a/board/matrix_vision/mvblm7/mvblm7.c b/board/matrix_vision/mvblm7/mvblm7.c
index b07f91393c2acf589c35069ee1de41c91b842e86..3dcff676f2587faedf3bc2404bde376da0c543f7 100644 (file)
--- a/board/matrix_vision/mvblm7/mvblm7.c
+++ b/board/matrix_vision/mvblm7/mvblm7.c
@@ -50,7 +50,7 @@ int fixed_sdram(void)
                if (ddr_size & 1)
                        return -1;
        }
-       im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff);
+       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
        im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) &
                LAWAR_SIZE);
 

diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c
index 4a44fda31e917711ff1cb828df3dd125fe58f192..93ada0b5b47d5273361fc7ccc2505594b40bea8b 100644 (file)
--- a/board/sbc8349/sbc8349.c
+++ b/board/sbc8349/sbc8349.c
@@ -101,7 +101,7 @@ int fixed_sdram(void)
                        return -1;
                }
        }
-       im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff);
+       im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
        im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
 
 #if (CFG_DDR_SIZE != 256)

diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c
index 76f2474491a7b36441d5608e8bff64b95f62996b..f4a0e9001286803ac43fddc5c15b78a655769425 100644 (file)
--- a/cpu/mpc83xx/spd_sdram.c
+++ b/cpu/mpc83xx/spd_sdram.c
@@ -274,7 +274,7 @@ long int spd_sdram()
        /*
         * Set up LAWBAR for all of DDR.
         */
-       ecm->bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff);
+       ecm->bar = CFG_DDR_SDRAM_BASE & 0xfffff000;
        ecm->ar  = (LAWAR_EN | LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & law_size));
        debug("DDR:bar=0x%08x\n", ecm->bar);
        debug("DDR:ar=0x%08x\n", ecm->ar);

diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index 67e81c0574d5ef94accf5c86abd379e803fae908..f15b0a8c9e5cc3c910a75acfa29282bd8322b1e7 100644 (file)
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -85,7 +85,8 @@ int checkcpu (void)
        struct cpu_type *cpu;
 #ifdef CONFIG_DDR_CLK_FREQ
        volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
-       u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9;
+       u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO)
+               >> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT;
 #else
        u32 ddr_ratio = 0;
 #endif

diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c
index bc1550d7c260352bdcc0a78984757f87b495dc58..037a60fba9a4944e6c3418e619b56884927c8aff 100644 (file)
--- a/cpu/mpc85xx/fdt.c
+++ b/cpu/mpc85xx/fdt.c
@@ -152,7 +152,6 @@ static inline void ft_fixup_l2cache(void *blob)
        }
        fdt_setprop(blob, off, "cache-unified", NULL, 0);
        fdt_setprop_cell(blob, off, "cache-block-size", line_size);
-       fdt_setprop_cell(blob, off, "cache-line-size", line_size);
        fdt_setprop_cell(blob, off, "cache-size", size);
        fdt_setprop_cell(blob, off, "cache-sets", num_sets);
        fdt_setprop_cell(blob, off, "cache-level", 2);
@@ -181,7 +180,6 @@ static inline void ft_fixup_cache(void *blob)
                dnum_sets = dsize / (dline_size * dnum_ways);
 
                fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size);
-               fdt_setprop_cell(blob, off, "d-cache-line-size", dline_size);
                fdt_setprop_cell(blob, off, "d-cache-size", dsize);
                fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets);
 
@@ -192,7 +190,6 @@ static inline void ft_fixup_cache(void *blob)
                inum_sets = isize / (iline_size * inum_ways);
 
                fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size);
-               fdt_setprop_cell(blob, off, "i-cache-line-size", iline_size);
                fdt_setprop_cell(blob, off, "i-cache-size", isize);
                fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets);
 

diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c
index 1cda1e34ebf78c1d9ac2c1663ba1892a7c4aed86..70dfad0321ee73aa86d55a541fb752e9efdc9786 100644 (file)
--- a/cpu/mpc85xx/speed.c
+++ b/cpu/mpc85xx/speed.c
@@ -54,7 +54,8 @@ void get_sys_info (sys_info_t * sysInfo)
 
 #ifdef CONFIG_DDR_CLK_FREQ
        {
-               u32 ddr_ratio = ((gur->porpllsr) & 0x00003e00) >> 9;
+               u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO)
+                       >> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT;
                if (ddr_ratio != 0x7)
                        sysInfo->freqDDRBus = ddr_ratio * CONFIG_DDR_CLK_FREQ;
        }
@@ -101,9 +102,9 @@ int get_clocks (void)
         * PORDEVSR2_SEC_CFG bit is 0 on all 85xx boards that are not an 8544.
         */
        if (gur->pordevsr2 & MPC85xx_PORDEVSR2_SEC_CFG)
-               gd->i2c1_clk = sys_info.freqSystemBus / 3;
-       else
                gd->i2c1_clk = sys_info.freqSystemBus / 2;
+       else
+               gd->i2c1_clk = sys_info.freqSystemBus / 3;
 #else
        /* Most 85xx SOCs use CCB/2, so this is the default behavior. */
        gd->i2c1_clk = sys_info.freqSystemBus / 2;

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 0d1ee8a459d0cd01d5880ae4a92ce1c8e64fded7..72d063ae8900d6ec774a3363846a6f1cc3f4943c 100644 (file)
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1932,9 +1932,10 @@ ulong flash_get_size (ulong base, int banknum)
                        /* XXX - Need to test on x8/x16 in parallel. */
                        info->portwidth >>= 1;
                }
+
+               flash_write_cmd (info, 0, 0, info->cmd_reset);
        }
 
-       flash_write_cmd (info, 0, 0, info->cmd_reset);
        return (info->size);
 }
 

diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 559d6ea6caab83b03f145084c0e225a53603d420..50c9ddefd22d9bb7a762145ce15c5a1a082deacd 100644 (file)
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1552,6 +1552,13 @@ typedef struct par_io {
  */
 typedef struct ccsr_gur {
        uint    porpllsr;       /* 0xe0000 - POR PLL ratio status register */
+#ifdef CONFIG_MPC8536
+#define MPC85xx_PORPLLSR_DDR_RATIO     0x3e000000
+#define MPC85xx_PORPLLSR_DDR_RATIO_SHIFT       25
+#else
+#define MPC85xx_PORPLLSR_DDR_RATIO     0x00003e00
+#define MPC85xx_PORPLLSR_DDR_RATIO_SHIFT       9
+#endif
        uint    porbmsr;        /* 0xe0004 - POR boot mode status register */
 #define MPC85xx_PORBMSR_HA             0x00070000
        uint    porimpscr;      /* 0xe0008 - POR I/O impedance status and control register */

diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 55d78528dbad0a0826e7f7ca687e0e757062d3f9..09bb87e3b2080fa348362156b047ebd3fc656f60 100644 (file)
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -174,6 +174,7 @@
 #define CONFIG_FLASH_CFI_DRIVER                        /* use the CFI driver */
 #define CFG_FLASH_BASE         0xFE000000      /* start of FLASH   */
 #define CFG_FLASH_SIZE         8               /* flash size in MB */
+#define CFG_FLASH_PROTECTION   1               /* Use h/w Flash protection. */
 #define CFG_FLASH_EMPTY_INFO                   /* display empty sectors */
 #define CFG_FLASH_USE_BUFFER_WRITE             /* buffer up multiple bytes */
 
@@ -596,7 +597,7 @@
 #define CONFIG_FDTFILE         mpc8313erdb.dtb
 
 #define CONFIG_LOADADDR                500000  /* default location for tftp and bootm */
-#define CONFIG_BOOTDELAY       -1      /* -1 disables auto-boot */
+#define CONFIG_BOOTDELAY       6       /* -1 disables auto-boot */
 #define CONFIG_BAUDRATE                115200
 
 #define XMK_STR(x)     #x

diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index 5879a823b8515eab51327fb7afcbe38526e25826..83f64c6a53109a31b3ad776506c19d604b9fb207 100644 (file)
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -193,6 +193,7 @@
 
 #define CFG_FLASH_BASE         0xFE000000 /* FLASH base address */
 #define CFG_FLASH_SIZE         8 /* FLASH size is 8M */
+#define CFG_FLASH_PROTECTION   1               /* Use h/w Flash protection. */
 
 #define CFG_LBLAWBAR0_PRELIM   CFG_FLASH_BASE /* Window base at flash base */
 #define CFG_LBLAWAR0_PRELIM    0x80000016 /* 8MB window size */

diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index 977142b10f3ed7aa4bb17835d46510454c9ac2ba..1ae5bae7c0f29ef6cf982160838f3dd1e4a9164c 100644 (file)
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -181,6 +181,7 @@
 #define CONFIG_FLASH_CFI_DRIVER        /* use the CFI driver */
 #define CFG_FLASH_BASE         0xFE000000      /* FLASH base address */
 #define CFG_FLASH_SIZE         16      /* FLASH size is 16M */
+#define CFG_FLASH_PROTECTION   1               /* Use h/w Flash protection. */
 
 #define CFG_LBLAWBAR0_PRELIM   CFG_FLASH_BASE  /* Window base at flash base */
 #define CFG_LBLAWAR0_PRELIM    0x80000018      /* 32MB window size */
@@ -570,7 +571,7 @@
 #define CONFIG_FDTFILE         mpc832x_rdb.dtb
 
 #define CONFIG_LOADADDR                500000  /* default location for tftp and bootm */
-#define CONFIG_BOOTDELAY       -1      /* -1 disables auto-boot */
+#define CONFIG_BOOTDELAY       6       /* -1 disables auto-boot */
 #define CONFIG_BAUDRATE                115200
 
 #define XMK_STR(x)     #x

diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index 01cf557bab5955488cbc0cee870c41a3cf704a35..9a9b500fa2d96ba585017b2c17df889dcf85f295 100644 (file)
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -169,6 +169,7 @@
 #define CONFIG_FLASH_CFI_DRIVER        /* use the CFI driver */
 #define CFG_FLASH_BASE         0xFE000000      /* FLASH base address */
 #define CFG_FLASH_SIZE         16      /* FLASH size is 16M */
+#define CFG_FLASH_PROTECTION   1               /* Use h/w Flash protection. */
 
 #define CFG_LBLAWBAR0_PRELIM   CFG_FLASH_BASE  /* Window base at flash base */
 #define CFG_LBLAWAR0_PRELIM    0x80000018      /* 32MB window size */

diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 87f1672f1a1afe74e306ac5db80e33138248b2f1..8135254a6acc912255962d1284df2ea96df60de2 100644 (file)
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -156,6 +156,7 @@
 #define CONFIG_FLASH_CFI_DRIVER                        /* use the CFI driver */
 #define CFG_FLASH_BASE         0xFE000000      /* start of FLASH   */
 #define CFG_FLASH_SIZE         32              /* max flash size in MB */
+#define CFG_FLASH_PROTECTION   1               /* Use h/w Flash protection. */
 /* #define CFG_FLASH_USE_BUFFER_WRITE */
 
 #define CFG_BR0_PRELIM         (CFG_FLASH_BASE |       /* flash Base address */ \

diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index fa0c0a7150088264c5c7087ce60e0609a29af0f4..81ea9f8ceceef71066217dea0f9680f5dc189c90 100644 (file)
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -190,6 +190,7 @@ boards, we say we have two, but don't display a message if we find only one. */
 #define CFG_FLASH_BANKS_LIST   {CFG_FLASH_BASE, CFG_FLASH_BASE + 0x800000}
 #define CFG_FLASH_SIZE         16              /* FLASH size in MB */
 #define CFG_FLASH_SIZE_SHIFT   4               /* log2 of the above value */
+#define CFG_FLASH_PROTECTION   1               /* Use h/w Flash protection. */
 
 /* Vitesse 7385 */
 

diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h
index f60d7a7b03c08cf09d769cd86fa3818720dcf723..baff03e67321412d6a1141377cd6a801a237320b 100644 (file)
--- a/include/configs/MPC8360EMDS.h
+++ b/include/configs/MPC8360EMDS.h
@@ -194,6 +194,7 @@
 #define CONFIG_FLASH_CFI_DRIVER        /* use the CFI driver */
 #define CFG_FLASH_BASE         0xFE000000 /* FLASH base address */
 #define CFG_FLASH_SIZE         32 /* max FLASH size is 32M */
+#define CFG_FLASH_PROTECTION   1               /* Use h/w Flash protection. */
 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
 
 #define CFG_LBLAWBAR0_PRELIM   CFG_FLASH_BASE /* Window base at flash base */

diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index 7c87388980388f424d0c016b6b8bd08c2c24ced1..256f15665a34b974b3b7d143067f53558650080b 100644 (file)
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -229,6 +229,7 @@
 #define CONFIG_FLASH_CFI_DRIVER        /* use the CFI driver */
 #define CFG_FLASH_BASE         0xFE000000 /* FLASH base address */
 #define CFG_FLASH_SIZE         32 /* max FLASH size is 32M */
+#define CFG_FLASH_PROTECTION   1               /* Use h/w Flash protection. */
 
 #define CFG_LBLAWBAR0_PRELIM   CFG_FLASH_BASE /* Window base at flash base */
 #define CFG_LBLAWAR0_PRELIM    0x80000018 /* 32MB window size */

diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 2ac4ad0fa45a2b81b18db5fb02922d1e4f04c508..f818b0fdb0c46142b06435d02f36c88a0d0b05c1 100644 (file)
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -253,6 +253,7 @@
 #define CFG_FLASH_BASE         0xFE000000 /* FLASH base address */
 #define CFG_FLASH_SIZE         8 /* max FLASH size is 32M */
 
+#define CFG_FLASH_PROTECTION   1               /* Use h/w Flash protection. */
 #define CFG_FLASH_EMPTY_INFO                   /* display empty sectors */
 #define CFG_FLASH_USE_BUFFER_WRITE             /* buffer up multiple bytes */
 
@@ -632,7 +633,7 @@
 #define CONFIG_FDTFILE         mpc8379_rdb.dtb
 
 #define CONFIG_LOADADDR                500000  /* default location for tftp and bootm */
-#define CONFIG_BOOTDELAY       -1      /* -1 disables auto-boot */
+#define CONFIG_BOOTDELAY       6       /* -1 disables auto-boot */
 #define CONFIG_BAUDRATE                115200
 
 #define XMK_STR(x)     #x

diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 2578bef2781d4f0dfe5d65e6aa2d014ebfd70dab..b504add7aabf5ac812fd367ec910fc6892df18a1 100644 (file)
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -59,7 +59,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #endif
 #define CONFIG_SYS_CLK_FREQ    get_board_sys_clk(0) /* sysclk for MPC85xx */
-/* #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk(0) /\* ddrclk for MPC85xx *\/ FIXME-8536*/
+#define CONFIG_DDR_CLK_FREQ    get_board_ddr_clk(0)
 #define CONFIG_ICS307_REFCLK_HZ        33333000  /* ICS307 clock chip ref freq */
 #define CONFIG_GET_CLK_FROM_ICS307       /* decode sysclk and ddrclk freq
                                             from ICS307 instead of switches */
@@ -303,7 +303,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
  */
 #define CONFIG_ID_EEPROM
 #ifdef CONFIG_ID_EEPROM
-#define CONFIG_ID_EEPROM
 #define CFG_I2C_EEPROM_NXID
 #endif
 #define CFG_I2C_EEPROM_ADDR    0x57

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index d7e3a887cf8658253e84f7353d9624943fb80294..4114a42de1f237a3b435b44ac94497e0a50f9956 100644 (file)
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -108,6 +108,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   2
 
 /* I2C addresses of SPD EEPROMs */
+#define CFG_SPD_BUS_NUM                1       /* SPD EEPROMS locate on I2C bus 1 */
 #define SPD_EEPROM_ADDRESS1    0x51    /* CTLR 0 DIMM 0 */
 #define SPD_EEPROM_ADDRESS2    0x52    /* CTLR 1 DIMM 0 */
 
@@ -293,11 +294,25 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_FSL_I2C         /* Use FSL common I2C driver */
 #define CONFIG_HARD_I2C                /* I2C with hardware support */
 #undef CONFIG_SOFT_I2C         /* I2C bit-banged */
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_I2C_CMD_TREE
 #define CFG_I2C_SPEED          400000  /* I2C speed and slave address */
 #define CFG_I2C_EEPROM_ADDR    0x57
 #define CFG_I2C_SLAVE          0x7F
-#define CFG_I2C_NOPROBES       {0x69}  /* Don't probe these addrs */
-#define CFG_I2C_OFFSET         0x3100
+#define CFG_I2C_NOPROBES       {{0,0x29}}/* Don't probe these addrs */
+#define CFG_I2C_OFFSET         0x3000
+#define CFG_I2C2_OFFSET                0x3100
+
+/*
+ * I2C2 EEPROM
+ */
+#define CONFIG_ID_EEPROM
+#ifdef CONFIG_ID_EEPROM
+#define CFG_I2C_EEPROM_NXID
+#endif
+#define CFG_I2C_EEPROM_ADDR    0x57
+#define CFG_I2C_EEPROM_ADDR_LEN 1
+#define CFG_EEPROM_BUS_NUM     1
 
 /*
  * General PCI

diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 5d82bb46f9ad97dd784bd876c1eb6c0ff70e43af..7f30d683b9daabcba8fdcf1ba053f2525db2dabe 100644 (file)
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -528,7 +528,7 @@
 #if defined(CONFIG_MPC834X)
 #define HRCWH_ROM_LOC_PCI2             0x00200000
 #endif
-#if defined(CONIFG_MPC837X)
+#if defined(CONFIG_MPC837X)
 #define HRCWH_ROM_LOC_ON_CHIP_ROM      0x00300000
 #endif
 #define HRCWH_ROM_LOC_LOCAL_8BIT       0x00500000