]> git.sur5r.net Git - u-boot/commitdiff
armv8: Apply workaround for USB erratum A-009007 to LS1088A
authorRan Wang <ran.wang_1@nxp.com>
Fri, 22 Sep 2017 07:21:34 +0000 (15:21 +0800)
committerYork Sun <york.sun@nxp.com>
Mon, 9 Oct 2017 15:36:37 +0000 (08:36 -0700)
Rx Compliance tests may fail intermittently at high jitter
frequencies using default register values.

Program register USB_PHY_RX_OVRD_IN_HI in certain sequence
to make the Rx compliance test pass.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/fsl-layerscape/Kconfig
arch/arm/cpu/armv8/fsl-layerscape/soc.c

index 3518d8601d176b0e8e0782973d4deced6c17433a..85b7c70937e84f6694eb1e46c354e3007cc9ec37 100644 (file)
@@ -72,6 +72,7 @@ config ARCH_LS1088A
        select SYS_FSL_ERRATUM_A010165
        select SYS_FSL_ERRATUM_A008511
        select SYS_FSL_ERRATUM_A008850
+       select SYS_FSL_ERRATUM_A009007
        select SYS_FSL_HAS_CCI400
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_HAS_RGMII
index a90ee0afd7722c23f276de3a5a00c9ff54269ba8..497a4b541df8634856e401da7f9f1da3c01baf82 100644 (file)
@@ -127,7 +127,7 @@ static void erratum_a008997(void)
        out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_3);      \
        out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_4)
 
-#elif defined(CONFIG_ARCH_LS2080A)
+#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A)
 
 #define PROGRAM_USB_PHY_RX_OVRD_IN_HI(phy)     \
        out_le16((phy) + DCSR_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_1); \
@@ -149,7 +149,7 @@ static void erratum_a009007(void)
 
        usb_phy = (void __iomem *)SCFG_USB_PHY3;
        PROGRAM_USB_PHY_RX_OVRD_IN_HI(usb_phy);
-#elif defined(CONFIG_ARCH_LS2080A)
+#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A)
        void __iomem *dcsr = (void __iomem *)DCSR_BASE;
 
        PROGRAM_USB_PHY_RX_OVRD_IN_HI(dcsr + DCSR_USB_PHY1);