}
#ifdef CONFIG_MGCOGE3NE
-static void set_pin(int state, unsigned long mask);
+static void set_pin(int state, unsigned long mask, int port);
/*
* For mgcoge3ne boards, the mgcoge3un control is controlled from
if (bobcatreset) {
if (strcmp(bobcatreset, "true") == 0) {
puts("Forcing bobcat reset\n");
- set_pin(0, 0x00000004); /* clear PD29 to reset arm */
+ set_pin(0, 0x00000004, 3); /* clear PD29 (reset arm) */
udelay(1000);
- set_pin(1, 0x00000004);
+ set_pin(1, 0x00000004, 3);
} else
- set_pin(1, 0x00000004); /* set PD29 to not reset arm */
+ set_pin(1, 0x00000004, 3); /* don't reset arm */
}
}
#endif
#define SDA_MASK 0x00010000
#define SCL_MASK 0x00020000
-static void set_pin(int state, unsigned long mask)
+static void set_pin(int state, unsigned long mask, int port)
{
- ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 3);
+ ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, port);
if (state)
setbits_be32(&iop->pdat, mask);
setbits_be32(&iop->pdir, mask);
}
-static int get_pin(unsigned long mask)
+static int get_pin(unsigned long mask, int port)
{
- ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 3);
+ ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, port);
clrbits_be32(&iop->pdir, mask);
return 0 != (in_be32(&iop->pdat) & mask);
void set_sda(int state)
{
- set_pin(state, SDA_MASK);
+ set_pin(state, SDA_MASK, 3);
}
void set_scl(int state)
{
- set_pin(state, SCL_MASK);
+ set_pin(state, SCL_MASK, 3);
}
int get_sda(void)
{
- return get_pin(SDA_MASK);
+ return get_pin(SDA_MASK, 3);
}
int get_scl(void)
{
- return get_pin(SCL_MASK);
+ return get_pin(SCL_MASK, 3);
}
#if defined(CONFIG_HARD_I2C)