]> git.sur5r.net Git - u-boot/commitdiff
sh: Add trigger_address_error and support cpu reset
authorNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Wed, 16 Jun 2010 07:55:26 +0000 (16:55 +0900)
committerNobuhiro Iwamatsu <iwamatsu@nigauri.org>
Mon, 28 Jun 2010 02:58:34 +0000 (11:58 +0900)
This add support cpu reset by trigger_address_error function.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
arch/sh/cpu/sh2/watchdog.c
arch/sh/cpu/sh3/watchdog.c
arch/sh/cpu/sh4/watchdog.c
arch/sh/include/asm/system.h

index de0254b446429e1e56c28150070a2357c5c35a47..0257d8d15d8baccdf40d888e27a53a438ba59282 100644 (file)
@@ -1,6 +1,6 @@
 /*
- * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhoro@renesas.com>
- * Copyright (C) 2008 Renesas Solutions Corp.
+ * Copyright (C) 2008,2010 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+ * Copyright (C) 2008,2010 Renesas Solutions Corp.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
@@ -20,6 +20,7 @@
 
 #include <common.h>
 #include <asm/processor.h>
+#include <asm/system.h>
 
 int watchdog_init(void)
 {
@@ -28,6 +29,9 @@ int watchdog_init(void)
 
 void reset_cpu(unsigned long ignored)
 {
+       /* Address error with SR.BL=1 first. */
+       trigger_address_error();
+
        while (1)
                ;
 }
index 92bea747193edf834c78d1649855006d141d07fa..90694f8664b343a9d1f5e20795104de806f421c1 100644 (file)
@@ -1,4 +1,7 @@
 /*
+ * (C) Copyright 2010
+ * Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+ *
  * (C) Copyright 2007
  * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
  *
@@ -20,6 +23,7 @@
 
 #include <common.h>
 #include <asm/processor.h>
+#include <asm/system.h>
 
 int watchdog_init(void)
 {
@@ -28,6 +32,9 @@ int watchdog_init(void)
 
 void reset_cpu(unsigned long ignored)
 {
+       /* Address error with SR.BL=1 first. */
+       trigger_address_error();
+
        while (1)
                ;
 }
index f6924290f00c381916c9ba24c8ba33625cf8351b..d7e1703e696cd0cbe278163610c706ed26d16edf 100644 (file)
@@ -17,6 +17,7 @@
 
 #include <common.h>
 #include <asm/processor.h>
+#include <asm/system.h>
 #include <asm/io.h>
 
 #define WDT_BASE       WTCNT
@@ -66,6 +67,9 @@ int watchdog_disable(void)
 
 void reset_cpu(unsigned long ignored)
 {
+       /* Address error with SR.BL=1 first. */
+       trigger_address_error();
+
        while (1)
                ;
 }
index 90a53a0dc4df08cf326e71b31946fb39b66674aa..56fd77acea6ee0f4acf6e6d74ac75cb89e6b4f99 100644 (file)
@@ -272,4 +272,14 @@ void enable_hlt(void);
 
 #define arch_align_stack(x) (x)
 
+static inline void trigger_address_error(void)
+{
+       __asm__ __volatile__ (
+               "ldc %0, sr\n\t"
+               "mov.l @%1, %0"
+               :
+               : "r" (0x10000000), "r" (0x80000001)
+       );
+}
+
 #endif