*/
#ifdef CONFIG_CMD_NET
#define CONFIG_MII /* expose smi ove miiphy interface */
-#if !defined(CONFIG_ARMADA_375)
-#define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */
-#endif
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
#define CONFIG_ARP_TIMEOUT 200
#define CONFIG_NET_RETRY_COUNT 50
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_MV=y
CONFIG_SPI_FLASH=y
-CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
CONFIG_PCI=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_MMC_SDHCI_MV=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
CONFIG_SCSI=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
CONFIG_PCI=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=200000000
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
CONFIG_PCI=y
CONFIG_SCSI=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
CONFIG_PCI=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
CONFIG_PCI=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
CONFIG_PCI=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_ATSHA204A=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_MV=y
-CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y
+CONFIG_MVNETA=y
CONFIG_DEBUG_UART_BASE=0xd0012000
CONFIG_DEBUG_UART_CLOCK=250000000
CONFIG_DEBUG_UART_SHIFT=2
help
This MAC is present in Andestech SoCs.
+config MVNETA
+ bool "Marvell Armada 385 network interface support"
+ depends on ARMADA_XP || ARMADA_38X
+ select PHYLIB
+ help
+ This driver supports the network interface units in the
+ Marvell ARMADA XP and 38X SoCs
+
config MVPP2
bool "Marvell Armada 375/7K/8K network interface support"
depends on ARMADA_375 || ARMADA_8K
/*
* Ethernet Driver configuration
*/
-#define CONFIG_MVNETA /* Enable Marvell Gbe Controller Driver */
#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
#define CONFIG_ARP_TIMEOUT 200
#define CONFIG_NET_RETRY_COUNT 50
CONFIG_MVGBE
CONFIG_MVGBE_PORTS
CONFIG_MVMFP_V2
-CONFIG_MVNETA
CONFIG_MVS
CONFIG_MVSATA_IDE
CONFIG_MVSATA_IDE_USE_PORT0