arm64: zynqmp: Label whole PL part as fpga_full region

This will simplify dt overlay structure for the whole PL.

Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 3dd17e6c3f1e150ba30d1b1f504eb80d9898151a..877874e7bf1cf5a82b490f9053fcc71df43f3500 100644 (file)
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -282,7 +282,14 @@
                compatible = "arm,cortex-a53-edac";
        };
 
-       pcap {
+       fpga_full: fpga-full {
+               compatible = "fpga-region";
+               fpga-mgr = <&pcap>;
+               #address-cells = <2>;
+               #size-cells = <2>;
+       };
+
+       pcap: pcap {
                compatible = "xlnx,zynqmp-pcap-fpga";
        };