]> git.sur5r.net Git - u-boot/commitdiff
Blackfin: unify default I2C settings for ADI boards
authorMike Frysinger <vapier@gentoo.org>
Tue, 8 Jun 2010 20:18:00 +0000 (16:18 -0400)
committerMike Frysinger <vapier@gentoo.org>
Tue, 13 Jul 2010 21:50:52 +0000 (17:50 -0400)
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Heiko Schocher <hs@denx.de>
18 files changed:
include/configs/bf518f-ezbrd.h
include/configs/bf526-ezbrd.h
include/configs/bf527-ezkit.h
include/configs/bf533-ezkit.h
include/configs/bf533-stamp.h
include/configs/bf537-pnav.h
include/configs/bf537-stamp.h
include/configs/bf538f-ezkit.h
include/configs/bf548-ezkit.h
include/configs/bf561-ezkit.h
include/configs/bfin_adi_common.h
include/configs/cm-bf527.h
include/configs/cm-bf537e.h
include/configs/cm-bf537u.h
include/configs/cm-bf548.h
include/configs/ibf-dsp561.h
include/configs/tcm-bf518.h
include/configs/tcm-bf537.h

index 7d20b66d50ebcf9bb840ce6d88c1e5f7b88dabb7..6eec1c91a7e870c9a731ee497e1d13ef44d51e95 100644 (file)
  */
 #define CONFIG_BFIN_TWI_I2C    1
 #define CONFIG_HARD_I2C                1
-#define CONFIG_SYS_I2C_SPEED   50000
-#define CONFIG_SYS_I2C_SLAVE   0
 
 
 /*
index ecda21689d8bfcc6556d293949bf33d666107cfa..82396d0ed2582f685f3aee687c0ccdf20519355e 100644 (file)
  */
 #define CONFIG_BFIN_TWI_I2C    1
 #define CONFIG_HARD_I2C                1
-#define CONFIG_SYS_I2C_SPEED   50000
-#define CONFIG_SYS_I2C_SLAVE   0
 
 
 /*
index 7800c3276aedf8b19d43287c7e833fe226d4a241..07e4ce86e1287c1e28c6516e2b6285c9acbdb4d9 100644 (file)
  */
 #define CONFIG_BFIN_TWI_I2C    1
 #define CONFIG_HARD_I2C                1
-#define CONFIG_SYS_I2C_SPEED   50000
-#define CONFIG_SYS_I2C_SLAVE   0
 
 
 /*
index c80ddcabdf2c8cc3c1db03d961ce35987c229894..37a70592f8b42f896fe7155d6c018d45d593bb7b 100644 (file)
        } while (0)
 #define I2C_DELAY              udelay(5)       /* 1/4 I2C clock duration */
 
-#define CONFIG_SYS_I2C_SPEED           50000
-#define CONFIG_SYS_I2C_SLAVE           0
 #endif
 
 
index 2ec9c422aa44ded7b3a7d62fbde87d792d75ced3..02c8bc3c36e8ef2d546cdfdab10772f4d7f7d760 100644 (file)
        } while (0)
 #define I2C_DELAY              udelay(5)       /* 1/4 I2C clock duration */
 
-#define CONFIG_SYS_I2C_SPEED           50000
-#define CONFIG_SYS_I2C_SLAVE           0
 #endif
 
 
index cf40d06b8868e47040c48ff5aa45fd911ae0c403..8daebc884672aba73a5cc9f5cf6cbb50f1b046da 100644 (file)
  */
 #define CONFIG_BFIN_TWI_I2C    1
 #define CONFIG_HARD_I2C                1
-#define CONFIG_SYS_I2C_SPEED           50000
-#define CONFIG_SYS_I2C_SLAVE           0
 
 
 /*
index cba4ac05481a156c4cb72c4e82a23893720ecdfc..35928627d830597fb6d0330d0ccee304a54ab484 100644 (file)
  */
 #define CONFIG_BFIN_TWI_I2C    1
 #define CONFIG_HARD_I2C                1
-#define CONFIG_SYS_I2C_SPEED   50000
-#define CONFIG_SYS_I2C_SLAVE   0
 
 
 /*
index 59e05650ec1233c09e0efb89f90e32cdb95e6af4..1c14b6bdd37a69b55a0b8c327938a38be3e6d30b 100644 (file)
  */
 #define CONFIG_BFIN_TWI_I2C    1
 #define CONFIG_HARD_I2C                1
-#define CONFIG_SYS_I2C_SPEED   50000
-#define CONFIG_SYS_I2C_SLAVE   0
 
 
 /*
index f9c97114ad060792ba68d165296d5b1f8bd87233..60cca0c07a37ea69aad2b611ba2194d0e88836e6 100644 (file)
  */
 #define CONFIG_BFIN_TWI_I2C    1
 #define CONFIG_HARD_I2C                1
-#define CONFIG_SYS_I2C_SPEED   50000
-#define CONFIG_SYS_I2C_SLAVE   0
 
 
 /*
index 1e3fdef64a36234ab9a92f16839e2ed79ae05312..036bfe412faa7ffea9b777202e38071a6800c75e 100644 (file)
        } while (0)
 #define I2C_DELAY              udelay(5)       /* 1/4 I2C clock duration */
 
-#define CONFIG_SYS_I2C_SPEED           50000
-#define CONFIG_SYS_I2C_SLAVE           0
 #endif
 
 
index 82daeb1000646e9e6c4a14a4a83e8088f1c3e2c6..57a73098fce89d674042e7b1b6ce9dd16100a42d 100644 (file)
 # define CONFIG_NET_RETRY_COUNT 20
 #endif
 
+/*
+ * I2C Settings
+ */
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
+# ifndef CONFIG_SYS_I2C_SPEED
+#  define CONFIG_SYS_I2C_SPEED 50000
+# endif
+# ifndef CONFIG_SYS_I2C_SLAVE
+#  define CONFIG_SYS_I2C_SLAVE 0
+# endif
+#endif
+
 /*
  * Misc Settings
  */
index ad1dd1296409418d13b96fc26123654f005b7fa1..e0c6d53b2c7abf7273b5e303c68eba718dc203c9 100644 (file)
  */
 #define CONFIG_BFIN_TWI_I2C    1
 #define CONFIG_HARD_I2C                1
-#define CONFIG_SYS_I2C_SPEED   50000
-#define CONFIG_SYS_I2C_SLAVE   0
 
 
 /*
index 8d0bc1232f001ce1f3d964aec51293b3b002e86c..742df9c0199159fe6b4b9399d7d27ac3323935ac 100644 (file)
  */
 #define CONFIG_BFIN_TWI_I2C    1
 #define CONFIG_HARD_I2C                1
-#define CONFIG_SYS_I2C_SPEED   50000
-#define CONFIG_SYS_I2C_SLAVE   0
 
 
 /*
index bbea3ab00991acfeb88b46df865d8ceece5f331a..9def99f728302bd865b6fedc700c4b26169a1b54 100644 (file)
  */
 #define CONFIG_BFIN_TWI_I2C    1
 #define CONFIG_HARD_I2C                1
-#define CONFIG_SYS_I2C_SPEED   50000
-#define CONFIG_SYS_I2C_SLAVE   0
 
 
 /*
index 93c4c8ddc1ac71ff3954b1cd7f28f58d608fb3f6..63b9399e142dd4437664b3f93bd5f2bfc290373f 100644 (file)
  */
 #define CONFIG_BFIN_TWI_I2C    1
 #define CONFIG_HARD_I2C                1
-#define CONFIG_SYS_I2C_SPEED   50000
-#define CONFIG_SYS_I2C_SLAVE   0
 
 
 /*
index 5601416fafe0ca7eefbfbcb63ed9322e6470499e..2c0a263da293c6e6b36cde1a1304336d0910628f 100644 (file)
        } while (0)
 #define I2C_DELAY              udelay(5)       /* 1/4 I2C clock duration */
 
-#define CONFIG_SYS_I2C_SPEED   50000
-#define CONFIG_SYS_I2C_SLAVE   0
 #endif
 
 
index 9c04d8a28e7d27e1e9e95b074738f0c729abc675..52055e80dcbd03fb6b34800aedcf2228c54fbdc8 100644 (file)
  */
 #define CONFIG_BFIN_TWI_I2C    1
 #define CONFIG_HARD_I2C                1
-#define CONFIG_SYS_I2C_SPEED   50000
-#define CONFIG_SYS_I2C_SLAVE   0
 
 
 /*
index 409a042d05183adfce96304d976b70387aab6bfb..24ce8f854a1876be4320697d4d1724391084cf61 100644 (file)
  */
 #define CONFIG_BFIN_TWI_I2C    1
 #define CONFIG_HARD_I2C                1
-#define CONFIG_SYS_I2C_SPEED   50000
-#define CONFIG_SYS_I2C_SLAVE   0
 
 
 /*