If the clock framework provides the driver with valid clock,
enable them, otherwise the SCIF might not work if the clock
are not enabled prior to the driver probe.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
plat->base = addr;
ret = clk_get_by_name(dev, "fck", &sh_serial_clk);
- if (!ret)
- plat->clk = clk_get_rate(&sh_serial_clk);
- else
+ if (!ret) {
+ ret = clk_enable(&sh_serial_clk);
+ if (!ret)
+ plat->clk = clk_get_rate(&sh_serial_clk);
+ } else {
plat->clk = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
"clock", 1);
+ }
plat->type = dev_get_driver_data(dev);
return 0;