return ops->get_gpio_base(dev, gbasep);
}
+int pch_get_io_base(struct udevice *dev, u32 *iobasep)
+{
+ struct pch_ops *ops = pch_get_ops(dev);
+
+ *iobasep = 0;
+ if (!ops->get_io_base)
+ return -ENOSYS;
+
+ return ops->get_io_base(dev, iobasep);
+}
+
static int pch_uclass_post_bind(struct udevice *bus)
{
/*
* @return 0 if OK, -ve on error (e.g. there is no GPIO base)
*/
int (*get_gpio_base)(struct udevice *dev, u32 *gbasep);
+
+ /**
+ * get_io_base() - get the address of IO base
+ *
+ * @dev: PCH device to check
+ * @iobasep: Returns address of IO base if available, else 0
+ * @return 0 if OK, -ve on error (e.g. there is no IO base)
+ */
+ int (*get_io_base)(struct udevice *dev, u32 *iobasep);
};
#define pch_get_ops(dev) ((struct pch_ops *)(dev)->driver->ops)
*/
int pch_get_gpio_base(struct udevice *dev, u32 *gbasep);
+/**
+ * pch_get_io_base() - get the address of IO base
+ *
+ * @dev: PCH device to check
+ * @iobasep: Returns address of IO base if available, else 0
+ * @return 0 if OK, -ve on error (e.g. there is no IO base)
+ */
+int pch_get_io_base(struct udevice *dev, u32 *iobasep);
+
#endif