]> git.sur5r.net Git - u-boot/commitdiff
fpga: Define bitstream type based on command selection
authorMichal Simek <michal.simek@xilinx.com>
Fri, 2 May 2014 12:09:30 +0000 (14:09 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 20 May 2014 13:23:46 +0000 (15:23 +0200)
Clean up partial, full and compressed bitstream handling.
U-Boot supports full bitstream loading and partial
based on detection which is not 100% correct.
Extending fpga_load/fpga_loadbitstream() with one more
argument which stores bitstream type.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
board/matrix_vision/common/mv_common.c
common/cmd_fpga.c
drivers/fpga/fpga.c
drivers/fpga/spartan2.c
drivers/fpga/spartan3.c
drivers/fpga/virtex2.c
drivers/fpga/xilinx.c
drivers/fpga/zynqpl.c
include/fpga.h
include/xilinx.h

index 70133b5118ba87f6b4372a7c426f9e01fb7d7fed..1be5aba2e9459ee38739eb5d3a1fe32fb85facdf 100644 (file)
@@ -77,7 +77,7 @@ int mv_load_fpga(void)
                return -1;
        }
 
-       result = fpga_load(0, fpga_data, data_size);
+       result = fpga_load(0, fpga_data, data_size, BIT_FULL);
        if (!result)
                bootstage_mark(BOOTSTAGE_ID_START);
 
index 68b54277ad2344e5f5ec5479a7a5cd626e7f3067..4fafed9df2d55ac6f931f4221c0e4d900bd6f3e2 100644 (file)
@@ -148,11 +148,11 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
                break;
 
        case FPGA_LOAD:
-               rc = fpga_load(dev, fpga_data, data_size);
+               rc = fpga_load(dev, fpga_data, data_size, BIT_FULL);
                break;
 
        case FPGA_LOADB:
-               rc = fpga_loadbitstream(dev, fpga_data, data_size);
+               rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_FULL);
                break;
 
 #if defined(CONFIG_CMD_FPGA_LOADMK)
@@ -182,7 +182,8 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
                                        data = (ulong)image_get_data(hdr);
                                        data_size = image_get_data_size(hdr);
                                }
-                               rc = fpga_load(dev, (void *)data, data_size);
+                               rc = fpga_load(dev, (void *)data, data_size,
+                                              BIT_FULL);
                        }
                        break;
 #if defined(CONFIG_FIT)
@@ -224,7 +225,8 @@ int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
                                        return 1;
                                }
 
-                               rc = fpga_load(dev, fit_data, data_size);
+                               rc = fpga_load(dev, fit_data, data_size,
+                                              BIT_FULL);
                        }
                        break;
 #endif
index b940d9b316bc67ead42096066502032207c88650..e77095090911c0e455228a81a59445115c086f72 100644 (file)
@@ -173,7 +173,8 @@ int fpga_add(fpga_type devtype, void *desc)
 /*
  * Convert bitstream data and load into the fpga
  */
-int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
+int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
+                             bitstream_type bstype)
 {
        printf("Bitstream support not implemented for this FPGA device\n");
        return FPGA_FAIL;
@@ -182,7 +183,7 @@ int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
 /*
  * Generic multiplexing code
  */
-int fpga_load(int devnum, const void *buf, size_t bsize)
+int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype)
 {
        int ret_val = FPGA_FAIL;           /* assume failure */
        const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
@@ -192,7 +193,8 @@ int fpga_load(int devnum, const void *buf, size_t bsize)
                switch (desc->devtype) {
                case fpga_xilinx:
 #if defined(CONFIG_FPGA_XILINX)
-                       ret_val = xilinx_load(desc->devdesc, buf, bsize);
+                       ret_val = xilinx_load(desc->devdesc, buf, bsize,
+                                             bstype);
 #else
                        fpga_no_sup((char *)__func__, "Xilinx devices");
 #endif
index 705405614033123e50aa90823d809fc7d5a558fd..859fb3c7787af8562336e6c7e378b70b9fb3c994 100644 (file)
@@ -41,7 +41,8 @@ static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 
 /* ------------------------------------------------------------------------- */
 /* Spartan-II Generic Implementation */
-static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize,
+                        bitstream_type bstype)
 {
        int ret_val = FPGA_FAIL;
 
index 5c9412c2f63b0523556077ae2c2267a4a7756ab5..b0213e69992b5772f4e1984bf0a697cd34331832 100644 (file)
@@ -45,7 +45,8 @@ static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 
 /* ------------------------------------------------------------------------- */
 /* Spartan-II Generic Implementation */
-static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize,
+                        bitstream_type bstype)
 {
        int ret_val = FPGA_FAIL;
 
index e092147edd1073375731eb18d253a9cf1be82a04..0d2d9a4693264684bbeb5167790057c0ae07b732 100644 (file)
@@ -90,7 +90,8 @@ static int virtex2_ssm_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize);
 static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 
-static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize,
+                       bitstream_type bstype)
 {
        int ret_val = FPGA_FAIL;
 
index 8837f5c122e781a6bcb05f928a030b16dd1480ef..ab9f51733e9f14744702e0f2e5be15492828effd 100644 (file)
@@ -24,7 +24,8 @@ static int xilinx_validate(xilinx_desc *desc, char *fn);
 
 /* ------------------------------------------------------------------------- */
 
-int fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
+int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
+                      bitstream_type bstype)
 {
        unsigned int length;
        unsigned int swapsize;
@@ -127,17 +128,18 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
        dataptr += 4;
        printf("  bytes in bitstream = %d\n", swapsize);
 
-       return fpga_load(devnum, dataptr, swapsize);
+       return fpga_load(devnum, dataptr, swapsize, bstype);
 }
 
-int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize)
+int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
+               bitstream_type bstype)
 {
        if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
                printf ("%s: Invalid device descriptor\n", __FUNCTION__);
                return FPGA_FAIL;
        }
 
-       return desc->operations->load(desc, buf, bsize);
+       return desc->operations->load(desc, buf, bsize, bstype);
 }
 
 int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize)
index c066f21d79f323f17227b4001fa55358f9b14735..572c0784714d8addf0e3ec41e08b36ee44d228b9 100644 (file)
@@ -357,8 +357,8 @@ static int zynq_validate_bitstream(xilinx_desc *desc, const void *buf,
        return 0;
 }
 
-
-static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize)
+static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize,
+                    bitstream_type bstype)
 {
        unsigned long ts; /* Timestamp */
        u32 partialbit = 0;
index 15e603a169d9f643173d84baf914e7690f56b5f0..a55e49f9589dbe919afc5de8fd45f3b6a42d5a60 100644 (file)
@@ -36,12 +36,18 @@ typedef struct {            /* typedef fpga_desc */
 } fpga_desc;                   /* end, typedef fpga_desc */
 
 
+typedef enum {
+       BIT_FULL = 0,
+} bitstream_type;
+
 /* root function definitions */
 extern void fpga_init(void);
 extern int fpga_add(fpga_type devtype, void *desc);
 extern int fpga_count(void);
-extern int fpga_load(int devnum, const void *buf, size_t bsize);
-extern int fpga_loadbitstream(int devnum, char *fpgadata, size_t size);
+extern int fpga_load(int devnum, const void *buf, size_t bsize,
+                    bitstream_type bstype);
+extern int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
+                             bitstream_type bstype);
 extern int fpga_dump(int devnum, const void *buf, size_t bsize);
 extern int fpga_info(int devnum);
 extern const fpga_desc *const fpga_validate(int devnum, const void *buf,
index 9801267c593fc8c98964b6088d75c77a2c66c96a..7d83ba20956206291e0c86277835bf21e01984f1 100644 (file)
@@ -45,14 +45,15 @@ typedef struct {            /* typedef xilinx_desc */
 } xilinx_desc;                 /* end, typedef xilinx_desc */
 
 struct xilinx_fpga_op {
-       int (*load)(xilinx_desc *, const void *, size_t);
+       int (*load)(xilinx_desc *, const void *, size_t, bitstream_type);
        int (*dump)(xilinx_desc *, const void *, size_t);
        int (*info)(xilinx_desc *);
 };
 
 /* Generic Xilinx Functions
  *********************************************************************/
-int xilinx_load(xilinx_desc *desc, const void *image, size_t size);
+int xilinx_load(xilinx_desc *desc, const void *image, size_t size,
+               bitstream_type bstype);
 int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 int xilinx_info(xilinx_desc *desc);