return i;
}
-void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
- const unsigned int iomux_size)
+void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr,
+ const iomux_cfg_t *iomux_setup,
+ const unsigned int iomux_size)
{
struct mxs_spl_data *data = (struct mxs_spl_data *)
((CONFIG_SYS_TEXT_BASE - sizeof(struct mxs_spl_data)) & ~0xf);
/*
* Store all registers on old stack pointer, this will allow us later to
* return to the BootROM and let the BootROM load U-Boot into RAM.
+ *
+ * WARNING: Register r0 and r1 are used by the BootROM to pass data
+ * to the called code. Register r0 will contain arbitrary
+ * data that are set in the BootStream. In case this code
+ * was started with CALL instruction, register r1 will contain
+ * pointer to the return value this function can then set.
+ * The code below MUST NOT CHANGE register r0 and r1 !
*/
push {r0-r12,r14}
- /* save control register c1 */
- mrc p15, 0, r0, c1, c0, 0
- push {r0}
+ /* Save control register c1 */
+ mrc p15, 0, r2, c1, c0, 0
+ push {r2}
- /*
- * set the cpu to SVC32 mode and store old CPSR register content
- */
- mrs r0,cpsr
- push {r0}
- bic r0,r0,#0x1f
- orr r0,r0,#0xd3
- msr cpsr,r0
+ /* Set the cpu to SVC32 mode and store old CPSR register content. */
+ mrs r2, cpsr
+ push {r2}
+ bic r2, r2, #0x1f
+ orr r2, r2, #0xd3
+ msr cpsr, r2
bl board_init_ll
+ /* Restore BootROM's CPU mode (especially FIQ). */
+ pop {r2}
+ msr cpsr,r2
+
/*
- * restore bootrom's cpu mode (especially FIQ)
+ * Restore c1 register. Especially set exception vector location
+ * back to BootROM space which is required by bootrom for USB boot.
*/
- pop {r0}
- msr cpsr,r0
+ pop {r2}
+ mcr p15, 0, r2, c1, c0, 0
+
+ pop {r0-r12,r14}
/*
- * restore c1 register
- * (especially set exception vector location back to
- * bootrom space which is required by bootrom for USB boot)
+ * In case this code was started by the CALL instruction, the register
+ * r0 is examined by the BootROM after this code returns. The value in
+ * r0 must be set to 0 to indicate successful return.
*/
- pop {r0}
- mcr p15, 0, r0, c1, c0, 0
+ mov r0, #0
- pop {r0-r12,r14}
bx lr
_hang:
#include <asm/arch/iomux-mx28.h>
#endif
-void mxs_common_spl_init(const iomux_cfg_t *iomux_setup,
- const unsigned int iomux_size);
+void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr,
+ const iomux_cfg_t *iomux_setup,
+ const unsigned int iomux_size);
#endif
struct mxs_pair {
MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
};
-void board_init_ll(void)
+void board_init_ll(const uint32_t arg, const uint32_t *resptr)
{
- mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
+ mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
/* switch LED on */
gpio_direction_output(MX28_PAD_PWM3__GPIO_3_28, 0);
(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
};
-void board_init_ll(void)
+void board_init_ll(const uint32_t arg, const uint32_t *resptr)
{
- mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
+ mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
}
dram_vals[HW_DRAM_CTL14] = HW_DRAM_CTL14_CONFIG;
}
-void board_init_ll(void)
+void board_init_ll(const uint32_t arg, const uint32_t *resptr)
{
- mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
+ mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
}
dram_vals[HW_DRAM_CTL29] = HW_DRAM_CTL29_CONFIG;
}
-void board_init_ll(void)
+void board_init_ll(const uint32_t arg, const uint32_t *resptr)
{
- mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
+ mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
}
(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL),
};
-void board_init_ll(void)
+void board_init_ll(const uint32_t arg, const uint32_t *resptr)
{
- mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
+ mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
}
MX28_PAD_GPMI_D06__GPIO_0_6 | MUX_CONFIG_LED,
};
-void board_init_ll(void)
+void board_init_ll(const uint32_t arg, const uint32_t *resptr)
{
- mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));
+ mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
}
void mxs_adjust_memory_params(uint32_t *dram_vals)