]> git.sur5r.net Git - u-boot/commitdiff
ARM change name of defines for AT91 arm926ejs
authorAchim Ehrlich <aehrlich@taskit.de>
Wed, 24 Feb 2010 09:29:16 +0000 (10:29 +0100)
committerTom Rix <Tom.Rix@windriver.com>
Sun, 7 Mar 2010 18:36:35 +0000 (12:36 -0600)
Configuration defines should be preceeded with CONFIG_SYS_. Renamed
some at91 specific defines to conform to this naming convention:

AT91_CPU_NAME to CONFIG_SYS_AT91_CPU_NAME
AT91_MAIN_CLOCK to CONFIG_SYS_AT91_MAIN_CLOCK

Signed-off-by: Achim Ehrlich <aehrlich@taskit.de>
29 files changed:
board/atmel/at91cap9adk/at91cap9adk.c
board/atmel/at91sam9261ek/at91sam9261ek.c
board/atmel/at91sam9263ek/at91sam9263ek.c
board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
board/atmel/at91sam9rlek/at91sam9rlek.c
board/esd/otc570/otc570.c
board/ronetix/pm9261/pm9261.c
board/ronetix/pm9263/pm9263.c
cpu/arm926ejs/at91/clock.c
cpu/arm926ejs/at91/cpu.c
include/asm-arm/arch-at91/at91cap9.h
include/asm-arm/arch-at91/at91rm9200.h
include/asm-arm/arch-at91/at91sam9260.h
include/asm-arm/arch-at91/at91sam9261.h
include/asm-arm/arch-at91/at91sam9263.h
include/asm-arm/arch-at91/at91sam9g45.h
include/asm-arm/arch-at91/at91sam9rl.h
include/configs/afeb9260.h
include/configs/at91cap9adk.h
include/configs/at91sam9260ek.h
include/configs/at91sam9261ek.h
include/configs/at91sam9263ek.h
include/configs/at91sam9m10g45ek.h
include/configs/at91sam9rlek.h
include/configs/cpu9260.h
include/configs/pm9261.h
include/configs/pm9263.h
include/configs/sbc35_a9g20.h
include/configs/tny_a9260.h

index 9f73df690337d8cd5fb4aa9b762d7ae50573f352..258d1eac29252a12035ffff17b096a4693d4d6cf 100644 (file)
@@ -282,7 +282,7 @@ void lcd_show_board_info(void)
        lcd_printf ("(C) 2008 ATMEL Corp\n");
        lcd_printf ("at91support@atmel.com\n");
        lcd_printf ("%s CPU at %s MHz\n",
-               AT91_CPU_NAME,
+               CONFIG_SYS_AT91_CPU_NAME,
                strmhz(temp, get_cpu_clk_rate()));
 
        dram_size = 0;
index 7ead2b8977cd976a1374d193f57ef31d522631b8..de5cfaeb00ae941dd369dd03b00f787d4761f8d7 100644 (file)
@@ -217,7 +217,7 @@ void lcd_show_board_info(void)
        lcd_printf ("(C) 2008 ATMEL Corp\n");
        lcd_printf ("at91support@atmel.com\n");
        lcd_printf ("%s CPU at %s MHz\n",
-               AT91_CPU_NAME,
+               CONFIG_SYS_AT91_CPU_NAME,
                strmhz(temp, get_cpu_clk_rate()));
 
        dram_size = 0;
index 8ab45af13cca6b6941a810cff1df26f53ded3219..5cd7aa75f8fd6c6b37da9bd01a639e61cf416ee3 100644 (file)
@@ -218,7 +218,7 @@ void lcd_show_board_info(void)
        lcd_printf ("(C) 2008 ATMEL Corp\n");
        lcd_printf ("at91support@atmel.com\n");
        lcd_printf ("%s CPU at %s MHz\n",
-               AT91_CPU_NAME,
+               CONFIG_SYS_AT91_CPU_NAME,
                strmhz(temp, get_cpu_clk_rate()));
 
        dram_size = 0;
index 45a14a95f26094499b8e42aa1ba06a3b8e4c984c..edfb627bbcd745bfa531a838b7c135532f1c99c5 100644 (file)
@@ -217,7 +217,7 @@ void lcd_show_board_info(void)
        lcd_printf ("(C) 2008 ATMEL Corp\n");
        lcd_printf ("at91support@atmel.com\n");
        lcd_printf ("%s CPU at %s MHz\n",
-               AT91_CPU_NAME,
+               CONFIG_SYS_AT91_CPU_NAME,
                strmhz(temp, get_cpu_clk_rate()));
 
        dram_size = 0;
index 7013ba2b13242bb38f9cabb9e0369efcd22875dc..e3749174681da404c50ae1d93d4b6b1176f04751 100644 (file)
@@ -157,7 +157,7 @@ void lcd_show_board_info(void)
        lcd_printf ("(C) 2008 ATMEL Corp\n");
        lcd_printf ("at91support@atmel.com\n");
        lcd_printf ("%s CPU at %s MHz\n",
-               AT91_CPU_NAME,
+               CONFIG_SYS_AT91_CPU_NAME,
                strmhz(temp, get_cpu_clk_rate()));
 
        dram_size = 0;
index 056df37ce7576a45ce6f68d15062644eb18711e5..3fe28cbbb6ce7f17f76234771ce24085cb6da7cb 100644 (file)
@@ -219,7 +219,7 @@ void lcd_show_board_info(void)
                nand_size += nand_info[i].size;
 
        lcd_printf("\n%s\n", U_BOOT_VERSION);
-       lcd_printf("%s CPU at %s MHz\n", AT91_CPU_NAME,
+       lcd_printf("%s CPU at %s MHz\n", CONFIG_SYS_AT91_CPU_NAME,
                                        strmhz(temp, get_cpu_clk_rate()));
        lcd_printf("  %ld MB SDRAM, %ld MB NAND\n",
                dram_size >> 20,
index 6915b9b2b3d6009007a651e65512525c68681fa3..8662339581fd1abd32eecce4c74ff5727ce585e2 100644 (file)
@@ -189,7 +189,7 @@ void lcd_show_board_info(void)
        lcd_printf ("(C) 2009 Ronetix GmbH\n");
        lcd_printf ("support@ronetix.at\n");
        lcd_printf ("%s CPU at %s MHz",
-               AT91_CPU_NAME,
+               CONFIG_SYS_AT91_CPU_NAME,
                strmhz(temp, get_cpu_clk_rate()));
 
        dram_size = 0;
index 29555f8db32aa4685976bdabcfb48ce76b53dcaa..23ea154b435c09f191e6fd281987f0557ddeb8c9 100644 (file)
@@ -304,7 +304,7 @@ void lcd_show_board_info(void)
        lcd_printf ("(C) 2009 Ronetix GmbH\n");
        lcd_printf ("support@ronetix.at\n");
        lcd_printf ("%s CPU at %s MHz",
-               AT91_CPU_NAME,
+               CONFIG_SYS_AT91_CPU_NAME,
                strmhz(temp, get_cpu_clk_rate()));
 
        dram_size = 0;
index 7e039076f4d4fcdc3219aae83574ccdf9f41c176..444d42d9ecca4ec2f48841a74a84b81129f9f880 100644 (file)
@@ -147,7 +147,7 @@ int at91_clock_init(unsigned long main_clock)
 {
        unsigned freq, mckr;
        at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
-#ifndef AT91_MAIN_CLOCK
+#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
        unsigned tmp;
        /*
         * When the bootloader initialized the main oscillator correctly,
index 993b29924aca09d1bb4203114b11a66ed9983063..1094f8c7f3c28c9c7055de5659be9d2df7d4a2a2 100644 (file)
 #include <asm/arch/clk.h>
 #include <asm/arch/io.h>
 
-#ifndef AT91_MAIN_CLOCK
-#define AT91_MAIN_CLOCK 0
+#ifndef CONFIG_SYS_AT91_MAIN_CLOCK
+#define CONFIG_SYS_AT91_MAIN_CLOCK 0
 #endif
 
 int arch_cpu_init(void)
 {
-       return at91_clock_init(AT91_MAIN_CLOCK);
+       return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
 }
 
 #if defined(CONFIG_DISPLAY_CPUINFO)
@@ -45,7 +45,7 @@ int print_cpuinfo(void)
 {
        char buf[32];
 
-       printf("CPU: %s\n", AT91_CPU_NAME);
+       printf("CPU: %s\n", CONFIG_SYS_AT91_CPU_NAME);
        printf("Crystal frequency: %8s MHz\n",
                                        strmhz(buf, get_main_clk_rate()));
        printf("CPU clock        : %8s MHz\n",
index 658124b70792f72a47d3977c2a5a75b064624ff2..5af6fdc25118adef972a6fd6bf320b700d120ab0 100644 (file)
 /*
  * Cpu Name
  */
-#define AT91_CPU_NAME  "AT91CAP9"
+#define CONFIG_SYS_AT91_CPU_NAME       "AT91CAP9"
 
 #endif
index 990f5a6db8e3b6047c647e0dfea7b5da268c06b1..1bee6f2b58177bc3ccfcb59f65d6ecb5f614ccaa 100644 (file)
 #define AT91_PMX_CA_NCS7       0x00002000
 #define AT91_PMX_CA_D16_31     0xFFFF0000
 
-#define AT91_CPU_NAME  "AT91RM9200"
+#define CONFIG_SYS_AT91_CPU_NAME       "AT91RM9200"
 
 #endif
index 7ca6078f4a7d12f46869b25930575f093ae9789d..a60a0811c09232fcf84a5990f12c8245a19df1ef 100644 (file)
  * Cpu Name
  */
 #if defined(CONFIG_AT91SAM9260)
-#define AT91_CPU_NAME  "AT91SAM9260"
+#define CONFIG_SYS_AT91_CPU_NAME       "AT91SAM9260"
 #elif defined(CONFIG_AT91SAM9G20)
-#define AT91_CPU_NAME  "AT91SAM9G20"
+#define CONFIG_SYS_AT91_CPU_NAME       "AT91SAM9G20"
 #endif
 
 #endif
index 1d8cab6085e3fb67cafe0453e8036ba01682951c..2952292c5d9bd37b595b91b3e4589d5587127eaa 100644 (file)
 /*
  * Cpu Name
  */
-#define AT91_CPU_NAME  "AT91SAM9261"
+#define CONFIG_SYS_AT91_CPU_NAME       "AT91SAM9261"
 
 #endif
index b26b7b4cd67490c23327ca30d0c87173c45a8aeb..c177bd059e891e17466ac6a373ec91efd843cedb 100644 (file)
 /*
  * Cpu Name
  */
-#define AT91_CPU_NAME  "AT91SAM9263"
+#define CONFIG_SYS_AT91_CPU_NAME       "AT91SAM9263"
 
 #endif
index 99c03f77e2ac12daf9f9d780749c86d8a438996d..445f4b212388ae731021c726b386aa15cb79d1c6 100644 (file)
 /*
  * Cpu Name
  */
-#define AT91_CPU_NAME  "AT91SAM9G45"
+#define CONFIG_SYS_AT91_CPU_NAME       "AT91SAM9G45"
 
 #endif
index 12054f6be8c56bce1612f4cb8e38aad381029245..8eb0d4fa291fbe1c03d8ffffc4d791b57fa5b0be 100644 (file)
 /*
  * Cpu Name
  */
-#define AT91_CPU_NAME  "AT91SAM9RL"
+#define CONFIG_SYS_AT91_CPU_NAME       "AT91SAM9RL"
 
 #endif
index 9f8c567c5e0d344599959df013f9e41824a3e5f6..24484fd0c87565dda50bf21ecaa1bdf6831baab2 100644 (file)
@@ -29,7 +29,7 @@
 #define CONFIG_AT91_LEGACY
 
 /* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK                18429952        /* from 18.432 MHz crystal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK             18429952        /* from 18.432 MHz crystal */
 #define CONFIG_SYS_HZ          1000
 
 #define CONFIG_AT91SAM9260     1       /* It's an Atmel AT91SAM9260 SoC*/
index 9da5846db2d25c645023bf4606c5ef4c2920540e..44c287033ff3acb66938699c6fc8f98d6d61e737 100644 (file)
@@ -30,7 +30,7 @@
 #define CONFIG_AT91_LEGACY
 
 /* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK                12000000        /* 12 MHz crystal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK     12000000        /* 12 MHz crystal */
 #define CONFIG_SYS_HZ          1000
 
 #define CONFIG_ARM926EJS       1       /* This is an ARM926EJS Core    */
index ff1e5b39d4a0deb6bfafa5a623702761336f65d5..b89242b3a17631ac6fa10d9565dc57dbbaaf65e4 100644 (file)
@@ -30,7 +30,7 @@
 #define CONFIG_AT91_LEGACY
 
 /* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK                18432000        /* 18.432 MHz crystal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK     18432000        /* 18.432 MHz crystal */
 #define CONFIG_SYS_HZ          1000
 
 #define CONFIG_ARM926EJS       1       /* This is an ARM926EJS Core    */
index 63b55d25b7e9639185d2589f15f261339d50d7a9..df8181b755ba7bcd8337e2154810347257339f46 100644 (file)
@@ -30,7 +30,7 @@
 #define CONFIG_AT91_LEGACY
 
 /* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK                18432000        /* 18.432 MHz crystal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK     18432000        /* 18.432 MHz crystal */
 #define CONFIG_SYS_HZ          1000
 
 #define CONFIG_ARM926EJS       1       /* This is an ARM926EJS Core    */
index 5a46d6a13f721829d56a161df652329e72a61b09..5cafa1ef4ac3df80f1c8192d2332667bc7be3e4a 100644 (file)
@@ -28,7 +28,7 @@
 #define __CONFIG_H
 
 /* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK                16367660        /* 16.367 MHz crystal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK     16367660        /* 16.367 MHz crystal */
 #define CONFIG_SYS_HZ          1000
 
 #define CONFIG_ARM926EJS       1       /* This is an ARM926EJS Core    */
index ce21831bbffb39b81758795e430080e269ef4e8c..44c5496b631cf675fd8214b91b499acc2eb2d92c 100644 (file)
@@ -30,7 +30,7 @@
 #define CONFIG_AT91_LEGACY
 
 /* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK                12000000        /* from 12 MHz crystal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK     12000000        /* from 12 MHz crystal */
 #define CONFIG_SYS_HZ          1000
 
 #define CONFIG_ARM926EJS       1       /* This is an ARM926EJS Core    */
index 95f3d6c0927bbfe5ded47b5ce8264db61d7acafc..e8fcd66c940673bed9cd06e035520f93034da67e 100644 (file)
@@ -30,7 +30,7 @@
 #define CONFIG_AT91_LEGACY
 
 /* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK                12000000        /* 12 MHz crystal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK     12000000        /* 12 MHz crystal */
 #define CONFIG_SYS_HZ          1000
 
 #define CONFIG_ARM926EJS       1       /* This is an ARM926EJS Core    */
index 38f34c27a950df89c8a6f7e232d6dcdf776a7437..fb6f79a42300260b24320211f075e4d67ab3841d 100644 (file)
@@ -35,7 +35,7 @@
 
 #define CONFIG_DISPLAY_CPUINFO 1
 
-#define AT91_MAIN_CLOCK                18432000
+#define CONFIG_SYS_AT91_MAIN_CLOCK     18432000
 #define CONFIG_SYS_HZ          1000
 
 #define CONFIG_ARM926EJS       1
index 8ee132b8898403448203541c2d95fc1aa9f170f2..47bb8c09aa415499c3b14512013076006f86ad7f 100644 (file)
 #define CONFIG_AT91_LEGACY
 
 /* ARM asynchronous clock */
-#define AT91_CPU_NAME          "AT91SAM9261"
+#define CONFIG_SYS_AT91_CPU_NAME       "AT91SAM9261"
 
 #define CONFIG_DISPLAY_BOARDINFO
 
 #define MASTER_PLL_DIV         15
 #define MASTER_PLL_MUL         162
 #define MAIN_PLL_DIV           2
-#define AT91_MAIN_CLOCK                18432000
+#define CONFIG_SYS_AT91_MAIN_CLOCK     18432000
 
 #define CONFIG_SYS_HZ          1000
 
index a6fdcaac6f306c4eed7e98200f5a33670eda85bf..807dba8f423bfe9dbbf196ec0984b7e45f279992 100644 (file)
@@ -37,7 +37,7 @@
 #define MASTER_PLL_DIV         6
 #define MASTER_PLL_MUL         65
 #define MAIN_PLL_DIV           2       /* 2 or 4 */
-#define AT91_MAIN_CLOCK        18432000
+#define CONFIG_SYS_AT91_MAIN_CLOCK     18432000
 
 #define CONFIG_SYS_HZ          1000
 
index 1f2ff9e4e3c443f927e8c68989f59da544a5c003..b9f27cc95b7870a10e688f6aead97c9e9045e6e3 100644 (file)
@@ -41,7 +41,7 @@
 #endif
 
 /* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK                12000000        /* 12.000 MHz crystal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK     12000000        /* 12.000 MHz crystal */
 #define CONFIG_SYS_HZ          1000
 
 #define CONFIG_ARM926EJS       1       /* This is an ARM926EJS Core    */
index a159a400879ab3953a5178a95c736e0f20d3e9e5..5af2af3d1cb5efb52b02d259fdeeaca4e5eb3181 100644 (file)
@@ -51,7 +51,7 @@
 #endif
 
 /* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK                12000000        /* 12 MHz crystal */
+#define CONFIG_SYS_AT91_MAIN_CLOCK     12000000        /* 12 MHz crystal */
 #define CONFIG_SYS_HZ          1000
 
 #define CONFIG_ARM926EJS       1       /* This is an ARM926EJS Core */