]> git.sur5r.net Git - u-boot/commitdiff
warp7: Add PMIC support
authorVanessa Maegima <vanessa.maegima@nxp.com>
Fri, 19 Aug 2016 13:21:36 +0000 (10:21 -0300)
committerStefano Babic <sbabic@denx.de>
Tue, 6 Sep 2016 16:22:48 +0000 (18:22 +0200)
Add PMIC support. Tested by command "pmic PFUZE3000 dump".

Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
board/warp7/warp7.c
include/configs/warp7.h

index 27e31f35d55e170bc8bfdb07866d4c6fe44c7fdb..cffee4a19965ab9a8e4439ae90e299e21d831d7b 100644 (file)
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
 #include <asm/imx-common/iomux-v3.h>
+#include <asm/imx-common/mxc_i2c.h>
 #include <asm/io.h>
 #include <common.h>
 #include <fsl_esdhc.h>
+#include <i2c.h>
 #include <mmc.h>
 #include <asm/arch/crm_regs.h>
 #include <usb.h>
+#include <power/pmic.h>
+#include <power/pfuze3000_pmic.h>
+#include "../freescale/common/pfuze.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -25,6 +30,26 @@ DECLARE_GLOBAL_DATA_PTR;
 #define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW |    \
                        PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM)
 
+#define I2C_PAD_CTRL   (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
+       PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM)
+
+#ifdef CONFIG_SYS_I2C_MXC
+#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
+/* I2C1 for PMIC */
+static struct i2c_pads_info i2c_pad_info1 = {
+       .scl = {
+               .i2c_mode = MX7D_PAD_I2C1_SCL__I2C1_SCL | PC,
+               .gpio_mode = MX7D_PAD_I2C1_SCL__GPIO4_IO8 | PC,
+               .gp = IMX_GPIO_NR(4, 8),
+       },
+       .sda = {
+               .i2c_mode = MX7D_PAD_I2C1_SDA__I2C1_SDA | PC,
+               .gpio_mode = MX7D_PAD_I2C1_SDA__GPIO4_IO9 | PC,
+               .gp = IMX_GPIO_NR(4, 9),
+       },
+};
+#endif
+
 int dram_init(void)
 {
        gd->ram_size = PHYS_SDRAM_SIZE;
@@ -85,11 +110,43 @@ int board_early_init_f(void)
        return 0;
 }
 
+#ifdef CONFIG_POWER
+#define I2C_PMIC       0
+static struct pmic *pfuze;
+int power_init_board(void)
+{
+       int ret;
+       unsigned int reg, rev_id;
+
+       ret = power_pfuze3000_init(I2C_PMIC);
+       if (ret)
+               return ret;
+
+       pfuze = pmic_get("PFUZE3000");
+       ret = pmic_probe(pfuze);
+       if (ret)
+               return ret;
+
+       pmic_reg_read(pfuze, PFUZE3000_DEVICEID, &reg);
+       pmic_reg_read(pfuze, PFUZE3000_REVID, &rev_id);
+       printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id);
+
+       /* disable Low Power Mode during standby mode */
+       pmic_reg_write(pfuze, PFUZE3000_LDOGCTL, 0x1);
+
+       return 0;
+}
+#endif
+
 int board_init(void)
 {
        /* address of boot parameters */
        gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
+       #ifdef CONFIG_SYS_I2C_MXC
+               setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+       #endif
+
        return 0;
 }
 
index e59b16c3794676cb8ffed2607bb7178d2c80817f..57a8123d2ee38c71afcfdeeec5be0363259eaaa3 100644 (file)
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
+/* I2C configs */
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1
+#define CONFIG_SYS_I2C_SPEED           100000
+
+/* PMIC */
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#define CONFIG_POWER_PFUZE3000
+#define CONFIG_POWER_PFUZE3000_I2C_ADDR        0x08
+
 /* FLASH and environment organization */
 #define CONFIG_SYS_NO_FLASH
 #define CONFIG_ENV_SIZE                        SZ_8K