am335x: ddr_defs: Update EMIF parameters

EMIF parameters are calculated based on the AC timing
parameters from the SDRAM datasheet and the DDR frequency.

Current values for these paramters in AM335x U-Boot code,
though reliable, are not fully optimal. The most optimal
settings can be derived based on the guidelines published
at [1]. A pre-computed set of values with the most optimum
settings for AM335x EVM and BeagleBone can be found at [2].

[1] http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips
[2] http://processors.wiki.ti.com/index.php/OMAP_and_Sitara_CCS_support#AM335x

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>

diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index b4735bac218f0b5c412c15f410ea69239f8f5a17..879c5fbfa7a4f08cfd19ba7ef8543bed21bcb559 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -29,11 +29,11 @@
 #define CMD_DELAY              0x00
 #define PHY_DLL_LOCK_DIFF      0x0
 
-#define DDR2_EMIF_READ_LATENCY 0x05
-#define DDR2_EMIF_TIM1         0x0666B3D6
-#define DDR2_EMIF_TIM2         0x143731DA
-#define DDR2_EMIF_TIM3         0x00000347
-#define DDR2_EMIF_SDCFG                0x43805332
+#define DDR2_EMIF_READ_LATENCY 0x100005        /* Enable Dynamic Power Down */
+#define DDR2_EMIF_TIM1         0x0666B3C9
+#define DDR2_EMIF_TIM2         0x243631CA
+#define DDR2_EMIF_TIM3         0x0000033F
+#define DDR2_EMIF_SDCFG                0x41805332
 #define DDR2_EMIF_SDREF                0x0000081a
 #define DDR2_DLL_LOCK_DIFF     0x0
 #define DDR2_RATIO             0x80