]> git.sur5r.net Git - u-boot/commitdiff
usb: exynos5: arndale: Add network support
authorInderpal Singh <inderpal.singh@linaro.org>
Wed, 8 Jan 2014 03:49:57 +0000 (09:19 +0530)
committerMarek Vasut <marex@denx.de>
Mon, 13 Jan 2014 11:23:28 +0000 (12:23 +0100)
Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo
controller, connected to HSIC Phy of USB host controller via USB3503 hub.

This patch uses board specific board_usb_init function to perform reset
sequence for USB3503 hub and enables the relevant config options for
network to work.

Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
board/samsung/arndale/arndale.c
drivers/usb/host/ehci-exynos.c
include/configs/arndale.h

index 052fecdd5b3bb0158f24e9c391ee7607f199384a..9efc355dab22f933dcc17c3df85febc4f5a2b55f 100644 (file)
@@ -5,12 +5,33 @@
  */
 
 #include <common.h>
+#include <usb.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/dwmmc.h>
+#include <asm/arch/gpio.h>
 #include <asm/arch/power.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_USB_EHCI_EXYNOS
+int board_usb_init(int index, enum usb_init_type init)
+{
+       struct exynos5_gpio_part1 *gpio = (struct exynos5_gpio_part1 *)
+                                               samsung_get_base_gpio_part1();
+
+       /* Configure gpios for usb 3503 hub:
+        * disconnect, toggle reset and connect
+        */
+       s5p_gpio_direction_output(&gpio->d1, 7, 0);
+       s5p_gpio_direction_output(&gpio->x3, 5, 0);
+
+       s5p_gpio_direction_output(&gpio->x3, 5, 1);
+       s5p_gpio_direction_output(&gpio->d1, 7, 1);
+
+       return 0;
+}
+#endif
+
 int board_init(void)
 {
        gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
index 88e646690a9e325dc924bfe61e654004483ab1c9..9356878eb2e452ce05ea756b098ea02cf569ff96 100644 (file)
@@ -203,6 +203,8 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 
        setup_usb_phy(ctx->usb);
 
+       board_usb_init(index, init);
+
        *hccr = ctx->hcd;
        *hcor = (struct ehci_hcor *)((uint32_t) *hccr
                                + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
index 7e367f39b27297ad984381b98cc20535c54f216f..9584d82af731b15ac0f6f0ed7539519964f318bc 100644 (file)
 #define CONFIG_USB_EHCI_EXYNOS
 #define CONFIG_USB_STORAGE
 
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS     3
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+
 /* MMC SPL */
 #define CONFIG_EXYNOS_SPL
 #define CONFIG_SPL