Move inp_clk, vco_clk and flb_clk into arch_global_data and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
                printf("       CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n",
                       strmhz(buf1, gd->cpu_clk),
                       strmhz(buf2, gd->bus_clk),
-                      strmhz(buf3, gd->flb_clk));
+                      strmhz(buf3, gd->arch.flb_clk));
                printf("       INP CLK %s MHz VCO CLK %s MHz\n",
-                      strmhz(buf1, gd->inp_clk),
-                      strmhz(buf2, gd->vco_clk));
+                      strmhz(buf1, gd->arch.inp_clk),
+                      strmhz(buf2, gd->arch.vco_clk));
        }
 
        return 0;
 
                            ((in_be32(&pll->pcr) & 0xFF000000) >> 24) *
                            CONFIG_SYS_INPUT_CLKSRC;
                }
-               gd->vco_clk = vco;      /* Vco clock */
+               gd->arch.vco_clk = vco; /* Vco clock */
        } else if (bootmode == 3) {
                /* serial mode */
                vco = ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
-               gd->vco_clk = vco;      /* Vco clock */
+               gd->arch.vco_clk = vco; /* Vco clock */
        }
 
        if ((in_be16(&ccm->ccr) & CCM_MISCCR_LIMP) == CCM_MISCCR_LIMP) {
                /* Limp mode */
        } else {
-               gd->inp_clk = CONFIG_SYS_INPUT_CLKSRC;  /* Input clock */
+               gd->arch.inp_clk = CONFIG_SYS_INPUT_CLKSRC; /* Input clock */
 
                temp = (in_be32(&pll->pcr) & PLL_PCR_OUTDIV1_MASK) + 1;
                gd->cpu_clk = vco / temp;       /* cpu clock */
 
                temp = ((in_be32(&pll->pcr) & PLL_PCR_OUTDIV2_MASK) >> 4) + 1;
-               gd->flb_clk = vco / temp;       /* flexbus clock */
-               gd->bus_clk = gd->flb_clk;
+               gd->arch.flb_clk = vco / temp;  /* flexbus clock */
+               gd->bus_clk = gd->arch.flb_clk;
        }
 
 #ifdef CONFIG_FSL_I2C
 
                printf("       CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n",
                       strmhz(buf1, gd->cpu_clk),
                       strmhz(buf2, gd->bus_clk),
-                      strmhz(buf3, gd->flb_clk));
+                      strmhz(buf3, gd->arch.flb_clk));
 #ifdef CONFIG_PCI
                printf("       PCI CLK %s MHz INP CLK %s MHz VCO CLK %s MHz\n",
                       strmhz(buf1, gd->pci_clk),
-                      strmhz(buf2, gd->inp_clk),
-                      strmhz(buf3, gd->vco_clk));
+                      strmhz(buf2, gd->arch.inp_clk),
+                      strmhz(buf3, gd->arch.vco_clk));
 #else
                printf("       INP CLK %s MHz VCO CLK %s MHz\n",
-                      strmhz(buf1, gd->inp_clk),
-                      strmhz(buf2, gd->vco_clk));
+                      strmhz(buf1, gd->arch.inp_clk),
+                      strmhz(buf2, gd->arch.vco_clk));
 #endif
        }
 
 
 
                        out_be32(&pll->pcr, pcrvalue);
                }
-               gd->vco_clk = vco;      /* Vco clock */
+               gd->arch.vco_clk = vco; /* Vco clock */
        } else if (bootmode == 2) {
                /* Normal mode */
                vco =  ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
                        out_be32(&pll->pcr, pcrvalue);
                        vco = ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
                }
-               gd->vco_clk = vco;      /* Vco clock */
+               gd->arch.vco_clk = vco; /* Vco clock */
        } else if (bootmode == 3) {
                /* serial mode */
                vco =  ((in_be32(&pll->pcr) & 0xFF000000) >> 24) * CONFIG_SYS_INPUT_CLKSRC;
-               gd->vco_clk = vco;      /* Vco clock */
+               gd->arch.vco_clk = vco; /* Vco clock */
        }
 
        if ((in_be16(&ccm->ccr) & CCM_MISCCR_LIMP) == CCM_MISCCR_LIMP) {
                /* Limp mode */
        } else {
-               gd->inp_clk = CONFIG_SYS_INPUT_CLKSRC;  /* Input clock */
+               gd->arch.inp_clk = CONFIG_SYS_INPUT_CLKSRC; /* Input clock */
 
                temp = (in_be32(&pll->pcr) & PLL_PCR_OUTDIV1_MASK) + 1;
                gd->cpu_clk = vco / temp;       /* cpu clock */
                gd->bus_clk = vco / temp;       /* bus clock */
 
                temp = ((in_be32(&pll->pcr) & PLL_PCR_OUTDIV3_MASK) >> 8) + 1;
-               gd->flb_clk = vco / temp;       /* FlexBus clock */
+               gd->arch.flb_clk = vco / temp;  /* FlexBus clock */
 
 #ifdef CONFIG_PCI
                if (bPci) {
 
        unsigned long   i2c1_clk;
        unsigned long   i2c2_clk;
 #endif
+#ifdef CONFIG_EXTRA_CLOCK
+       unsigned long inp_clk;
+       unsigned long vco_clk;
+       unsigned long flb_clk;
+#endif
 };
 
 /*
        unsigned long   bus_clk;
 #ifdef CONFIG_PCI
        unsigned long   pci_clk;
-#endif
-#ifdef CONFIG_EXTRA_CLOCK
-       unsigned long   inp_clk;
-       unsigned long   vco_clk;
-       unsigned long   flb_clk;
 #endif
        phys_size_t     ram_size;       /* RAM size */
        unsigned long   reloc_off;      /* Relocation Offset */
 
        bd->bi_pcifreq = gd->pci_clk;           /* PCI Freq in Hz */
 #endif
 #ifdef CONFIG_EXTRA_CLOCK
-       bd->bi_inpfreq = gd->inp_clk;           /* input Freq in Hz */
-       bd->bi_vcofreq = gd->vco_clk;           /* vco Freq in Hz */
-       bd->bi_flbfreq = gd->flb_clk;           /* flexbus Freq in Hz */
+       bd->bi_inpfreq = gd->arch.inp_clk;              /* input Freq in Hz */
+       bd->bi_vcofreq = gd->arch.vco_clk;              /* vco Freq in Hz */
+       bd->bi_flbfreq = gd->arch.flb_clk;              /* flexbus Freq in Hz */
 #endif
        bd->bi_baudrate = gd->baudrate; /* Console Baudrate     */