am33xx/omap: Allow cache enable for all Sitara/OMAP

Enable the cache for all devices, unless CONFIG_SYS_DCACHE_OFF is defined.
This speeds up the Beaglebone Black boot considerable.

(Tested only on Beaglebone Black with SD card boot)

Signed-off-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c
index 7fe049e51312789532540d80232dcb1252ca0364..828d10bb5a4e59bf9aaa1a0ddf0775af22749dc3 100644 (file)
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -255,11 +255,3 @@ void s_init(void)
 #endif
 }
 #endif
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-       /* Enable D-cache. I-cache is already enabled in start.S */
-       dcache_enable();
-}
-#endif /* !CONFIG_SYS_DCACHE_OFF */

diff --git a/arch/arm/cpu/armv7/omap-common/Makefile b/arch/arm/cpu/armv7/omap-common/Makefile
index 5f5132f6617b844a2f48fdcb4604250d8c798a8d..7695e16d36f59a0b2b80ac3f3f314b316b3c4a68 100644 (file)
--- a/arch/arm/cpu/armv7/omap-common/Makefile
+++ b/arch/arm/cpu/armv7/omap-common/Makefile
@@ -22,6 +22,10 @@ obj-y        += pipe3-phy.o
 obj-$(CONFIG_SCSI_AHCI_PLAT) += sata.o
 endif
 
+ifeq ($(CONFIG_SYS_DCACHE_OFF),)
+obj-y  += omap-cache.o
+endif
+
 ifeq ($(CONFIG_OMAP34XX),)
 obj-y  += boot-common.o
 obj-y  += lowlevel_init.o

diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
index ba97d9ec565af9ea4d83e1c69118868ffed43063..5f50a1980157d646b1308bf8d98b529009d40d1e 100644 (file)
--- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c
+++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c
@@ -18,13 +18,8 @@
 #include <asm/emif.h>
 #include <asm/omap_common.h>
 #include <linux/compiler.h>
-#include <asm/cache.h>
 #include <asm/system.h>
 
-#define ARMV7_DCACHE_WRITEBACK  0xe
-#define        ARMV7_DOMAIN_CLIENT     1
-#define ARMV7_DOMAIN_MASK      (0x3 << 0)
-
 DECLARE_GLOBAL_DATA_PTR;
 
 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
@@ -263,40 +258,3 @@ int print_cpuinfo(void)
        return 0;
 }
 #endif
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-       /* Enable D-cache. I-cache is already enabled in start.S */
-       dcache_enable();
-}
-
-void dram_bank_mmu_setup(int bank)
-{
-       bd_t *bd = gd->bd;
-       int     i;
-
-       u32 start = bd->bi_dram[bank].start >> 20;
-       u32 size = bd->bi_dram[bank].size >> 20;
-       u32 end = start + size;
-
-       debug("%s: bank: %d\n", __func__, bank);
-       for (i = start; i < end; i++)
-               set_section_dcache(i, ARMV7_DCACHE_WRITEBACK);
-
-}
-
-void arm_init_domains(void)
-{
-       u32 reg;
-
-       reg = get_dacr();
-       /*
-       * Set DOMAIN to client access so that all permissions
-       * set in pagetables are validated by the mmu.
-       */
-       reg &= ~ARMV7_DOMAIN_MASK;
-       reg |= ARMV7_DOMAIN_CLIENT;
-       set_dacr(reg);
-}
-#endif

diff --git a/arch/arm/cpu/armv7/omap-common/omap-cache.c b/arch/arm/cpu/armv7/omap-common/omap-cache.c
new file mode 100644 (file)
index 0000000..579bebf
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap-common/omap-cache.c
@@ -0,0 +1,56 @@
+/*
+ *
+ * Common functions for OMAP4/5 based boards
+ *
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ *
+ * Author :
+ *     Aneesh V        <aneesh@ti.com>
+ *     Steve Sakoman   <steve@sakoman.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/cache.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define ARMV7_DCACHE_WRITEBACK  0xe
+#define ARMV7_DOMAIN_CLIENT    1
+#define ARMV7_DOMAIN_MASK      (0x3 << 0)
+
+void enable_caches(void)
+{
+       /* Enable D-cache. I-cache is already enabled in start.S */
+       dcache_enable();
+}
+
+void dram_bank_mmu_setup(int bank)
+{
+       bd_t *bd = gd->bd;
+       int     i;
+
+       u32 start = bd->bi_dram[bank].start >> 20;
+       u32 size = bd->bi_dram[bank].size >> 20;
+       u32 end = start + size;
+
+       debug("%s: bank: %d\n", __func__, bank);
+       for (i = start; i < end; i++)
+               set_section_dcache(i, ARMV7_DCACHE_WRITEBACK);
+}
+
+void arm_init_domains(void)
+{
+       u32 reg;
+
+       reg = get_dacr();
+       /*
+       * Set DOMAIN to client access so that all permissions
+       * set in pagetables are validated by the mmu.
+       */
+       reg &= ~ARMV7_DOMAIN_MASK;
+       reg |= ARMV7_DOMAIN_CLIENT;
+       set_dacr(reg);
+}

diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 9bb1a1c8f9af6d49345d0996f335126935a3fcb2..e252e7fd950604375917b9670201fba12d02bcf3 100644 (file)
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -478,11 +478,3 @@ void omap3_outer_cache_disable(void)
        omap3_update_aux_cr(0, 0x2);
 }
 #endif /* !CONFIG_SYS_L2CACHE_OFF */
-
-#ifndef CONFIG_SYS_DCACHE_OFF
-void enable_caches(void)
-{
-       /* Enable D-cache. I-cache is already enabled in start.S */
-       dcache_enable();
-}
-#endif /* !CONFIG_SYS_DCACHE_OFF */