]> git.sur5r.net Git - u-boot/commitdiff
MPC8xxx DDR: align informational prints
authorBecky Bruce <beckyb@kernel.crashing.org>
Fri, 17 Dec 2010 23:17:59 +0000 (17:17 -0600)
committerKumar Gala <galak@kernel.crashing.org>
Fri, 14 Jan 2011 07:32:19 +0000 (01:32 -0600)
Add spaces to cause the informational prints to line up with
the ones from init_func_ram() in board.c.  Output now looks like
this:

....
DRAM:  Detected 4096 MB of memory
       This U-Boot only supports < 4G of DDR
       You could rebuild it with CONFIG_PHYS_64BIT
       DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off)
....

The prints from lbc_sdram_init() have also been modified to line
line up and changed to start with "LBC SDRAM" instead of the
confusing "SDRAM".

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/cpu/mpc8xxx/ddr/main.c
board/freescale/mpc8540ads/mpc8540ads.c
board/freescale/mpc8541cds/mpc8541cds.c
board/freescale/mpc8548cds/mpc8548cds.c
board/freescale/mpc8555cds/mpc8555cds.c
board/freescale/mpc8560ads/mpc8560ads.c
board/freescale/mpc8568mds/mpc8568mds.c

index 6d582e97d47e2f477e8fb66682ead6176903fad1..e3888ff6effaf0380c433145f563fe5acd6ca276 100644 (file)
@@ -469,8 +469,9 @@ phys_size_t fsl_ddr_sdram(void)
        /* Check for 4G or more.  Bad. */
        if (total_memory >= (1ull << 32)) {
                printf("Detected %lld MB of memory\n", total_memory >> 20);
-               printf("This U-Boot only supports < 4G of DDR\n");
-               printf("You could rebuild it with CONFIG_PHYS_64BIT\n");
+               printf("       This U-Boot only supports < 4G of DDR\n");
+               printf("       You could rebuild it with CONFIG_PHYS_64BIT\n");
+               printf("       "); /* re-align to match init_func_ram print */
                total_memory = CONFIG_MAX_MEM_MAPPED;
        }
 #endif
index 9eeb13492136d5b7d16160e630ca4ad8d7f3e325..c75585e28c0ede2f79f10a8cd6f2d5aec06633b3 100644 (file)
@@ -127,8 +127,9 @@ void lbc_sdram_init(void)
        volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
        uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE;
 
-       puts("    SDRAM: ");
-       print_size (CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
+       puts("LBC SDRAM: ");
+       print_size(CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024,
+                  "\n       ");
 
        /*
         * Setup SDRAM Base and Option Registers
index 3ee666f422b3510305e96f81bcb7b0167eeb51fe..0d3752d56e54e7eab768fcb5e468d68a3b6701bb 100644 (file)
@@ -301,9 +301,9 @@ void lbc_sdram_init(void)
        uint cpu_board_rev;
        uint lsdmr_common;
 
-       puts("    SDRAM: ");
-
-       print_size (CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
+       puts("LBC SDRAM: ");
+       print_size(CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024,
+                  "\n       ");
 
        /*
         * Setup SDRAM Base and Option Registers
index 8ad6b22b19e933e4d76d4a019979ab9587b31233..2c455853a81ae5aed3f6b038373f2f7298156740 100644 (file)
@@ -121,9 +121,9 @@ void lbc_sdram_init(void)
        uint cpu_board_rev;
        uint lsdmr_common;
 
-       puts("    SDRAM: ");
-
-       print_size (CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
+       puts("LBC SDRAM: ");
+       print_size(CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024,
+                  "\n       ");
 
        /*
         * Setup SDRAM Base and Option Registers
index 02df6ae22ef6c5b2118fafa8984620ac141c1e7b..60d1758afeae201e58f31411c2102954a024dbfd 100644 (file)
@@ -299,9 +299,9 @@ void lbc_sdram_init(void)
        uint cpu_board_rev;
        uint lsdmr_common;
 
-       puts("    SDRAM: ");
-
-       print_size (CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
+       puts("LBC SDRAM: ");
+       print_size(CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024,
+                  "\n       ");
 
        /*
         * Setup SDRAM Base and Option Registers
index 26a64a3da5f3b4e6e280fdf30f2698dbbaf9bcfe..1a165bff8698bf87c39ab9ff2c90a71439e69487 100644 (file)
@@ -332,8 +332,9 @@ void lbc_sdram_init(void)
        volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
        uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE;
 
-       puts("    SDRAM: ");
-       print_size (CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
+       puts("LBC SDRAM: ");
+       print_size(CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024,
+                  "\n       ");
 
        /*
         * Setup SDRAM Base and Option Registers
index 07f8e51593756c54d8a6f77b2fadb19d1fa68391..a504f8a9dd668a0ea40c959991669cf18c784be0 100644 (file)
@@ -180,9 +180,9 @@ void lbc_sdram_init(void)
        uint *sdram_addr = (uint *)CONFIG_SYS_LBC_SDRAM_BASE;
        uint lsdmr_common;
 
-       puts("    SDRAM: ");
-
-       print_size (CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
+       puts("LBC SDRAM: ");
+       print_size(CONFIG_SYS_LBC_SDRAM_SIZE * 1024 * 1024,
+                  "\n       ");
 
        /*
         * Setup SDRAM Base and Option Registers