hrcon: Add support for the DH variant

hrcon DH(dual head) has two video outputs per FPGA.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>

diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c
index f11e26f5fa10ba0053f1df4b4593fd72785e8ef2..b288df894ae6e00ad9a1c80c360813c904449ca3 100644 (file)
--- a/board/gdsys/common/osd.c
+++ b/board/gdsys/common/osd.c
@@ -28,12 +28,45 @@
 
 #define PIXCLK_640_480_60 25180000
 
+#ifdef CONFIG_SYS_OSD_DH
+#define MAX_OSD_SCREEN 8
+#define OSD_DH_BASE 4
+#else
+#define MAX_OSD_SCREEN 4
+#endif
+
+#ifdef CONFIG_SYS_OSD_DH
+#define OSD_SET_REG(screen, fld, val) \
+       do { \
+               if (screen >= OSD_DH_BASE) \
+                       FPGA_SET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
+               else \
+                       FPGA_SET_REG(screen, osd0.fld, val); \
+       } while (0)
+#else
+#define OSD_SET_REG(screen, fld, val) \
+               FPGA_SET_REG(screen, osd0.fld, val)
+#endif
+
+#ifdef CONFIG_SYS_OSD_DH
+#define OSD_GET_REG(screen, fld, val) \
+       do {                                    \
+               if (screen >= OSD_DH_BASE) \
+                       FPGA_GET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
+               else \
+                       FPGA_GET_REG(screen, osd0.fld, val); \
+       } while (0)
+#else
+#define OSD_GET_REG(screen, fld, val) \
+               FPGA_GET_REG(screen, osd0.fld, val)
+#endif
+
 unsigned int base_width;
 unsigned int base_height;
 size_t bufsize;
 u16 *buf;
 
-unsigned int max_osd_screen = CONFIG_SYS_OSD_SCREENS - 1;
+unsigned int osd_screen_mask = 0;
 
 #ifdef CONFIG_SYS_ICS8N3QV01_I2C
 int ics8n3qv01_i2c[] = CONFIG_SYS_ICS8N3QV01_I2C;
@@ -47,6 +80,9 @@ int sil1178_i2c[] = CONFIG_SYS_SIL1178_I2C;
 int dp501_i2c[] = CONFIG_SYS_DP501_I2C;
 #endif
 
+#ifdef CONFIG_SYS_DP501_BASE
+int dp501_base[] = CONFIG_SYS_DP501_BASE;
+#endif
 
 #ifdef CONFIG_SYS_MPC92469AC
 static void mpc92469ac_calc_parameters(unsigned int fout,
@@ -216,7 +252,15 @@ static int osd_write_videomem(unsigned screen, unsigned offset,
        for (k = 0; k < charcount; ++k) {
                if (offset + k >= bufsize)
                        return -1;
-               FPGA_SET_REG(screen, videomem[offset + k], data[k]);
+#ifdef CONFIG_SYS_OSD_DH
+               if (screen >= OSD_DH_BASE)
+                       FPGA_SET_REG(screen - OSD_DH_BASE,
+                                    videomem1[offset + k], data[k]);
+               else
+                       FPGA_SET_REG(screen, videomem0[offset + k], data[k]);
+#else
+               FPGA_SET_REG(screen, videomem0[offset + k], data[k]);
+#endif
        }
 
        return charcount;
@@ -226,7 +270,12 @@ static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
        unsigned screen;
 
-       for (screen = 0; screen <= max_osd_screen; ++screen) {
+       if (argc < 5) {
+               cmd_usage(cmdtp);
+               return 1;
+       }
+
+       for (screen = 0; screen < MAX_OSD_SCREEN; ++screen) {
                unsigned x;
                unsigned y;
                unsigned charcount;
@@ -236,10 +285,8 @@ static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
                char *text;
                int res;
 
-               if (argc < 5) {
-                       cmd_usage(cmdtp);
-                       return 1;
-               }
+               if (!(osd_screen_mask & (1 << screen)))
+                       continue;
 
                x = simple_strtoul(argv[1], NULL, 16);
                y = simple_strtoul(argv[2], NULL, 16);
@@ -266,9 +313,16 @@ int osd_probe(unsigned screen)
        int old_bus = i2c_get_bus_num();
        bool pixclock_present = false;
        bool output_driver_present = false;
+#ifdef CONFIG_SYS_DP501_I2C
+#ifdef CONFIG_SYS_DP501_BASE
+       uint8_t dp501_addr = dp501_base[screen];
+#else
+       uint8_t dp501_addr = DP501_I2C_ADDR;
+#endif
+#endif
 
-       FPGA_GET_REG(0, osd.version, &version);
-       FPGA_GET_REG(0, osd.features, &features);
+       OSD_GET_REG(0, version, &version);
+       OSD_GET_REG(0, features, &features);
 
        base_width = ((features & 0x3f00) >> 8) + 1;
        base_height = (features & 0x001f) + 1;
@@ -277,9 +331,15 @@ int osd_probe(unsigned screen)
        if (!buf)
                return -1;
 
+#ifdef CONFIG_SYS_OSD_DH
+       printf("OSD%d-%d: Digital-OSD version %01d.%02d, %d" "x%d characters\n",
+              (screen >= OSD_DH_BASE) ? (screen - OSD_DH_BASE) : screen,
+              (screen > 3) ? 1 : 0, version/100, version%100, base_width,
+              base_height);
+#else
        printf("OSD%d:  Digital-OSD version %01d.%02d, %d" "x%d characters\n",
-               screen, version/100, version%100, base_width, base_height);
-
+              screen, version/100, version%100, base_width, base_height);
+#endif
        /* setup pixclock */
 
 #ifdef CONFIG_SYS_MPC92469AC
@@ -330,8 +390,8 @@ int osd_probe(unsigned screen)
 
 #ifdef CONFIG_SYS_DP501_I2C
        i2c_set_bus_num(dp501_i2c[screen]);
-       if (!i2c_probe(DP501_I2C_ADDR)) {
-               dp501_powerup(DP501_I2C_ADDR);
+       if (!i2c_probe(dp501_addr)) {
+               dp501_powerup(dp501_addr);
                output_driver_present = true;
        }
 #endif
@@ -339,14 +399,14 @@ int osd_probe(unsigned screen)
        if (!output_driver_present)
                printf("       no output driver found\n");
 
-       FPGA_SET_REG(screen, osd.control, 0x0049);
+       OSD_SET_REG(screen, control, 0x0049);
 
-       FPGA_SET_REG(screen, osd.xy_size, ((32 - 1) << 8) | (16 - 1));
-       FPGA_SET_REG(screen, osd.x_pos, 0x007f);
-       FPGA_SET_REG(screen, osd.y_pos, 0x005f);
+       OSD_SET_REG(screen, xy_size, ((32 - 1) << 8) | (16 - 1));
+       OSD_SET_REG(screen, x_pos, 0x007f);
+       OSD_SET_REG(screen, y_pos, 0x005f);
 
-       if (screen > max_osd_screen)
-               max_osd_screen = screen;
+       if (pixclock_present && output_driver_present)
+               osd_screen_mask |= 1 << screen;
 
        i2c_set_bus_num(old_bus);
 
@@ -357,7 +417,12 @@ int osd_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
        unsigned screen;
 
-       for (screen = 0; screen <= max_osd_screen; ++screen) {
+       if ((argc < 4) || (strlen(argv[3]) % 4)) {
+               cmd_usage(cmdtp);
+               return 1;
+       }
+
+       for (screen = 0; screen < MAX_OSD_SCREEN; ++screen) {
                unsigned x;
                unsigned y;
                unsigned k;
@@ -367,10 +432,8 @@ int osd_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
                unsigned count = (argc > 4) ?
                        simple_strtoul(argv[4], NULL, 16) : 1;
 
-               if ((argc < 4) || (strlen(argv[3]) % 4)) {
-                       cmd_usage(cmdtp);
-                       return 1;
-               }
+               if (!(osd_screen_mask & (1 << screen)))
+                       continue;
 
                x = simple_strtoul(argv[1], NULL, 16);
                y = simple_strtoul(argv[2], NULL, 16);

diff --git a/board/gdsys/mpc8308/MAINTAINERS b/board/gdsys/mpc8308/MAINTAINERS
index 35704bc871084f374ad0ba06172be4c45fddada2..3895b01732485ab00f2725f8bbad96e34549a02e 100644 (file)
--- a/board/gdsys/mpc8308/MAINTAINERS
+++ b/board/gdsys/mpc8308/MAINTAINERS
@@ -4,6 +4,7 @@ S:      Maintained
 F:     board/gdsys/mpc8308/
 F:     include/configs/hrcon.h
 F:     configs/hrcon_defconfig
+F:     configs/hrcon_dh_defconfig
 F:     include/configs/strider.h
 F:     configs/strider_cpu_defconfig
 F:     configs/strider_con_defconfig

diff --git a/board/gdsys/mpc8308/hrcon.c b/board/gdsys/mpc8308/hrcon.c
index 5492718c52377e105c3bb0207778d26eb90cac21..3cc03cbdade987bf9249cc0088d02367b28d4f16 100644 (file)
--- a/board/gdsys/mpc8308/hrcon.c
+++ b/board/gdsys/mpc8308/hrcon.c
@@ -128,6 +128,7 @@ int last_stage_init(void)
 
        /* Turn on Parade DP501 */
        pca9698_direction_output(0x20, 10, 1);
+       pca9698_direction_output(0x20, 11, 1);
 
        ch0_rgmii2_present = !pca9698_get_value(0x20, 30);
 
@@ -174,6 +175,9 @@ int last_stage_init(void)
 
        ioep_fpga_print_info(0);
        osd_probe(0);
+#ifdef CONFIG_SYS_OSD_DH
+       osd_probe(4);
+#endif
 
        if (slaves <= 0)
                return 0;
@@ -185,6 +189,9 @@ int last_stage_init(void)
 
                ioep_fpga_print_info(k);
                osd_probe(k);
+#ifdef CONFIG_SYS_OSD_DH
+               osd_probe(k + 4);
+#endif
                if (hw_type_cat) {
                        miiphy_register(bb_miiphy_buses[k].name,
                                        bb_miiphy_read, bb_miiphy_write);
@@ -196,28 +203,44 @@ int last_stage_init(void)
 }
 
 /*
- * provide access to fpga gpios (for I2C bitbang)
+ * provide access to fpga gpios and controls (for I2C bitbang)
  * (these may look all too simple but make iocon.h much more readable)
  */
 void fpga_gpio_set(unsigned int bus, int pin)
 {
-       FPGA_SET_REG(bus, gpio.set, pin);
+       FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, gpio.set, pin);
 }
 
 void fpga_gpio_clear(unsigned int bus, int pin)
 {
-       FPGA_SET_REG(bus, gpio.clear, pin);
+       FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, gpio.clear, pin);
 }
 
 int fpga_gpio_get(unsigned int bus, int pin)
 {
        u16 val;
 
-       FPGA_GET_REG(bus, gpio.read, &val);
+       FPGA_GET_REG(bus >= 4 ? (bus - 4) : bus, gpio.read, &val);
 
        return val & pin;
 }
 
+void fpga_control_set(unsigned int bus, int pin)
+{
+       u16 val;
+
+       FPGA_GET_REG(bus >= 4 ? (bus - 4) : bus, control, &val);
+       FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, control, val | pin);
+}
+
+void fpga_control_clear(unsigned int bus, int pin)
+{
+       u16 val;
+
+       FPGA_GET_REG(bus >= 4 ? (bus - 4) : bus, control, &val);
+       FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, control, val & ~pin);
+}
+
 void mpc8308_init(void)
 {
        pca9698_direction_output(0x20, 4, 1);

diff --git a/configs/hrcon_dh_defconfig b/configs/hrcon_dh_defconfig
new file mode 100644 (file)
index 0000000..a059dd9
--- /dev/null
+++ b/configs/hrcon_dh_defconfig
@@ -0,0 +1,5 @@
+CONFIG_SYS_EXTRA_OPTIONS="HRCON_DH"
+
+CONFIG_PPC=y
+CONFIG_MPC83xx=y
+CONFIG_TARGET_HRCON=y

diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c
index db9b4026b37bc464f291811f6e8f6136d553884c..b000a0ec029bc9a47a5990b41971a456a0872950 100644 (file)
--- a/drivers/i2c/soft_i2c.c
+++ b/drivers/i2c/soft_i2c.c
@@ -473,3 +473,31 @@ U_BOOT_I2C_ADAP_COMPLETE(soft3, soft_i2c_init, soft_i2c_probe,
                         CONFIG_SYS_I2C_SOFT_SLAVE_4,
                         3)
 #endif
+#if defined(I2C_SOFT_DECLARATIONS5)
+U_BOOT_I2C_ADAP_COMPLETE(soft4, soft_i2c_init, soft_i2c_probe,
+                        soft_i2c_read, soft_i2c_write, NULL,
+                        CONFIG_SYS_I2C_SOFT_SPEED_5,
+                        CONFIG_SYS_I2C_SOFT_SLAVE_5,
+                        4)
+#endif
+#if defined(I2C_SOFT_DECLARATIONS6)
+U_BOOT_I2C_ADAP_COMPLETE(soft5, soft_i2c_init, soft_i2c_probe,
+                        soft_i2c_read, soft_i2c_write, NULL,
+                        CONFIG_SYS_I2C_SOFT_SPEED_6,
+                        CONFIG_SYS_I2C_SOFT_SLAVE_6,
+                        5)
+#endif
+#if defined(I2C_SOFT_DECLARATIONS7)
+U_BOOT_I2C_ADAP_COMPLETE(soft6, soft_i2c_init, soft_i2c_probe,
+                        soft_i2c_read, soft_i2c_write, NULL,
+                        CONFIG_SYS_I2C_SOFT_SPEED_7,
+                        CONFIG_SYS_I2C_SOFT_SLAVE_7,
+                        6)
+#endif
+#if defined(I2C_SOFT_DECLARATIONS8)
+U_BOOT_I2C_ADAP_COMPLETE(soft7, soft_i2c_init, soft_i2c_probe,
+                        soft_i2c_read, soft_i2c_write, NULL,
+                        CONFIG_SYS_I2C_SOFT_SPEED_8,
+                        CONFIG_SYS_I2C_SOFT_SLAVE_8,
+                        7)
+#endif

diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h
index 696af0aea4ebc0176ce22defc23f94d88500c918..16d5885e3797a7c894ec1cf390b512c38a96bea4 100644 (file)
--- a/include/configs/hrcon.h
+++ b/include/configs/hrcon.h
@@ -20,7 +20,11 @@
 
 #define        CONFIG_SYS_TEXT_BASE    0xFE000000
 
+#ifdef CONFIG_HRCON_DH
+#define CONFIG_IDENT_STRING    " hrcon dh 0.01"
+#else
 #define CONFIG_IDENT_STRING    " hrcon 0.01"
+#endif
 
 
 #define CONFIG_BOARD_EARLY_INIT_F
@@ -343,6 +347,22 @@
 #define CONFIG_SYS_I2C_IHS_SPEED_3             50000
 #define CONFIG_SYS_I2C_IHS_SLAVE_3             0x7F
 
+#ifdef CONFIG_HRCON_DH
+#define CONFIG_SYS_I2C_IHS_DUAL
+#define CONFIG_SYS_I2C_IHS_CH0_1
+#define CONFIG_SYS_I2C_IHS_SPEED_0_1           50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_0_1           0x7F
+#define CONFIG_SYS_I2C_IHS_CH1_1
+#define CONFIG_SYS_I2C_IHS_SPEED_1_1           50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_1_1           0x7F
+#define CONFIG_SYS_I2C_IHS_CH2_1
+#define CONFIG_SYS_I2C_IHS_SPEED_2_1           50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_2_1           0x7F
+#define CONFIG_SYS_I2C_IHS_CH3_1
+#define CONFIG_SYS_I2C_IHS_SPEED_3_1           50000
+#define CONFIG_SYS_I2C_IHS_SLAVE_3_1           0x7F
+#endif
+
 /*
  * Software (bit-bang) I2C driver configuration
  */
@@ -359,16 +379,48 @@
 #define CONFIG_SYS_I2C_SOFT_SPEED_4            50000
 #define CONFIG_SYS_I2C_SOFT_SLAVE_4            0x7F
 
+#ifdef CONFIG_HRCON_DH
+#define I2C_SOFT_DECLARATIONS5
+#define CONFIG_SYS_I2C_SOFT_SPEED_5            50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE_5            0x7F
+#define I2C_SOFT_DECLARATIONS6
+#define CONFIG_SYS_I2C_SOFT_SPEED_6            50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE_6            0x7F
+#define I2C_SOFT_DECLARATIONS7
+#define CONFIG_SYS_I2C_SOFT_SPEED_7            50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE_7            0x7F
+#define I2C_SOFT_DECLARATIONS8
+#define CONFIG_SYS_I2C_SOFT_SPEED_8            50000
+#define CONFIG_SYS_I2C_SOFT_SLAVE_8            0x7F
+#endif
+
+#ifdef CONFIG_HRCON_DH
+#define CONFIG_SYS_ICS8N3QV01_I2C              {9, 10, 11, 12, 13, 14, 15, 16}
+#define CONFIG_SYS_DP501_I2C                   {1, 3, 5, 7, 2, 4, 6, 8}
+#else
 #define CONFIG_SYS_ICS8N3QV01_I2C              {5, 6, 7, 8}
 #define CONFIG_SYS_DP501_I2C                   {1, 2, 3, 4}
+#endif
 
 #ifndef __ASSEMBLY__
 void fpga_gpio_set(unsigned int bus, int pin);
 void fpga_gpio_clear(unsigned int bus, int pin);
 int fpga_gpio_get(unsigned int bus, int pin);
+void fpga_control_set(unsigned int bus, int pin);
+void fpga_control_clear(unsigned int bus, int pin);
 #endif
 
+#ifdef CONFIG_HRCON_DH
+#define I2C_ACTIVE \
+       do { \
+               if (I2C_ADAP_HWNR > 3) \
+                       fpga_control_set(I2C_ADAP_HWNR, 0x0004); \
+               else \
+                       fpga_control_clear(I2C_ADAP_HWNR, 0x0004); \
+       } while (0)
+#else
 #define I2C_ACTIVE     { }
+#endif
 #define I2C_TRISTATE   { }
 #define I2C_READ \
        (fpga_gpio_get(I2C_ADAP_HWNR, 0x0040) ? 1 : 0)
@@ -401,6 +453,10 @@ int fpga_gpio_get(unsigned int bus, int pin);
 #define CONFIG_SYS_DP501_DIFFERENTIAL
 #define CONFIG_SYS_DP501_VCAPCTRL0     0x01 /* DDR mode 0, DE for H/VSYNC */
 
+#ifdef CONFIG_HRCON_DH
+#define CONFIG_SYS_OSD_DH
+#endif
+
 /*
  * General PCI
  * Addresses are mapped 1-1.

diff --git a/include/gdsys_fpga.h b/include/gdsys_fpga.h
index 69d248f170eb3008ef290bb1b74a94e370691902..3b8762df6694a301220a155bc94e636868ca7fca 100644 (file)
--- a/include/gdsys_fpga.h
+++ b/include/gdsys_fpga.h
@@ -157,9 +157,9 @@ struct ihs_fpga {
        u16 mc_rx_data;         /* 0x0072 */
        u16 reserved_5[69];     /* 0x0074 */
        u16 reflection_high;    /* 0x00fe */
-       struct ihs_osd osd;     /* 0x0100 */
+       struct ihs_osd osd0;    /* 0x0100 */
        u16 reserved_6[889];    /* 0x010e */
-       u16 videomem[31736];    /* 0x0800 */
+       u16 videomem0[2048];    /* 0x0800 */
 };
 #endif
 
@@ -171,7 +171,9 @@ struct ihs_fpga {
        u16 fpga_features;      /* 0x0006 */
        u16 reserved_0[1];      /* 0x0008 */
        u16 top_interrupt;      /* 0x000a */
-       u16 reserved_1[4];      /* 0x000c */
+       u16 reserved_1[2];      /* 0x000c */
+       u16 control;            /* 0x0010 */
+       u16 extended_control;   /* 0x0012 */
        struct ihs_gpio gpio;   /* 0x0014 */
        u16 mpc3w_control;      /* 0x001a */
        u16 reserved_2[2];      /* 0x001c */
@@ -191,9 +193,19 @@ struct ihs_fpga {
        u16 mc_rx_data;         /* 0x0072 */
        u16 reserved_5[69];     /* 0x0074 */
        u16 reflection_high;    /* 0x00fe */
-       struct ihs_osd osd;     /* 0x0100 */
+       struct ihs_osd osd0;    /* 0x0100 */
+#ifdef CONFIG_SYS_OSD_DH
+       u16 reserved_6[57];     /* 0x010e */
+       struct ihs_osd osd1;    /* 0x0180 */
+       u16 reserved_7[9];      /* 0x018e */
+       struct ihs_i2c i2c1;    /* 0x01a0 */
+       u16 reserved_8[1834];   /* 0x01ac */
+       u16 videomem0[2048];    /* 0x1000 */
+       u16 videomem1[2048];    /* 0x2000 */
+#else
        u16 reserved_6[889];    /* 0x010e */
-       u16 videomem[31736];    /* 0x0800 */
+       u16 videomem0[2048];    /* 0x0800 */
+#endif
 };
 #endif
 
@@ -254,9 +266,9 @@ struct ihs_fpga {
        u16 mc_rx_cmd_status;   /* 0x0070 */
        u16 mc_rx_data;         /* 0x0072 */
        u16 reserved_5[70];     /* 0x0074 */
-       struct ihs_osd osd;     /* 0x0100 */
+       struct ihs_osd osd0;    /* 0x0100 */
        u16 reserved_6[889];    /* 0x010e */
-       u16 videomem[31736];    /* 0x0800 */
+       u16 videomem0[2048];    /* 0x0800 */
 };
 #endif
 
@@ -275,9 +287,9 @@ struct ihs_fpga {
        u16 reserved_3[2];      /* 0x006c */
        struct ihs_i2c i2c1;    /* 0x0070 */
        u16 reserved_4[194];    /* 0x007c */
-       struct ihs_osd osd;     /* 0x0200 */
+       struct ihs_osd osd0;    /* 0x0200 */
        u16 reserved_5[761];    /* 0x020e */
-       u16 videomem[31736];    /* 0x0800 */
+       u16 videomem0[2048];    /* 0x0800 */
 };
 #endif