]> git.sur5r.net Git - u-boot/commitdiff
ARM: DTS: Re-sync logicpd-som-lv with Linux 4.16-rc3
authorAdam Ford <aford173@gmail.com>
Mon, 5 Mar 2018 10:16:33 +0000 (04:16 -0600)
committerTom Rini <trini@konsulko.com>
Mon, 5 Mar 2018 15:16:30 +0000 (10:16 -0500)
This should clean up a warning about a missing phy-cells

Signed-off-by: Adam Ford <aford173@gmail.com>
arch/arm/dts/logicpd-som-lv.dtsi

index 46dae556f7b88c638e39993217961c0f155b8eff..c1aa7a4518fbaca19e734795e25b4767a06a6005 100644 (file)
        hsusb2_phy: hsusb2_phy {
                compatible = "usb-nop-xceiv";
                reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
+               #phy-cells = <0>;
        };
 };
 
 &gpmc {
-       ranges = <0 0 0x00000000 0x1000000>;    /* CS0: 16MB for NAND */
+       ranges = <0 0 0x30000000 0x1000000>;    /* CS0: 16MB for NAND */
 
        nand@0,0 {
                compatible = "ti,omap2-nand";
                gpmc,device-width = <2>;
                #address-cells = <1>;
                #size-cells = <1>;
-
-               /* u-boot uses mtdparts=omap2-nand.0:512k(x-loader),1920k(u-boot),128k(u-boot-env),4m(kernel),-(fs) */
-
-               x-loader@0 {
-                       label = "x-loader";
-                       reg = <0 0x80000>;
-               };
-
-               bootloaders@80000 {
-                       label = "u-boot";
-                       reg = <0x80000 0x1e0000>;
-               };
-
-               bootloaders_env@260000 {
-                       label = "u-boot-env";
-                       reg = <0x260000 0x20000>;
-               };
-
-               kernel@280000 {
-                       label = "kernel";
-                       reg = <0x280000 0x400000>;
-               };
-
-               filesystem@680000 {
-                       label = "fs";
-                       reg = <0x680000 0>;     /* 0 = MTDPART_SIZ_FULL */
-               };
        };
 };
 
 &i2c1 {
-       clock-frequency = <400000>;
+       clock-frequency = <2600000>;
 
        twl: twl@48 {
                reg = <0x48>;
 
 &mmc3 {
        interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
-       pinctrl-0 = <&mmc3_pins>;
+       pinctrl-0 = <&mmc3_pins &wl127x_gpio>;
        pinctrl-names = "default";
        vmmc-supply = <&wl12xx_vmmc>;
        non-removable;
        wlcore: wlcore@2 {
                compatible = "ti,wl1273";
                reg = <2>;
-               interrupt-parent = <&gpio5>;
-               interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
+               interrupt-parent = <&gpio1>;
+               interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; /* gpio 2 */
                ref-clock-frequency = <26000000>;
        };
 };
                        OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
                        OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
                        OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
-                       OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */
-                       OMAP3_CORE1_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4)       /* sys_boot1.gpio_3 */
                        OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
                        OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
                >;
                        OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4)        /* sys_boot2.gpio_4 */
                >;
        };
+       wl127x_gpio: pinmux_wl127x_gpio_pin {
+               pinctrl-single,pins = <
+                       OMAP3_WKUP_IOPAD(0x2a0c, PIN_INPUT | MUX_MODE4)         /* sys_boot0.gpio_2 */
+                       OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4)        /* sys_boot1.gpio_3 */
+               >;
+       };
 };
 
 &omap3_pmx_core2 {