LIBS-y += post/libpost.o
LIBS-y += test/libtest.o
-ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),)
+ifneq ($(CONFIG_OMAP_COMMON),)
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
endif
CROSS_COMPILE ?= arm-linux-
ifndef CONFIG_STANDALONE_LOAD_ADDR
-ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),)
+ifneq ($(CONFIG_OMAP_COMMON),)
CONFIG_STANDALONE_LOAD_ADDR = 0x80300000
else
CONFIG_STANDALONE_LOAD_ADDR = 0xc100000
COBJS += abb.o
endif
-ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),)
+ifeq ($(CONFIG_OMAP34XX),)
COBJS += boot-common.o
SOBJS += lowlevel_init.o
endif
#define CONFIG_AM33XX
#define CONFIG_OMAP
+#define CONFIG_OMAP_COMMON
#include <asm/arch/omap.h>
#define CONFIG_OMAP 1 /* in a TI OMAP core */
#define CONFIG_OMAP34XX 1 /* which is a 34XX */
#define CONFIG_OMAP3_AM3517CRANE 1 /* working with CRANEBOARD */
+#define CONFIG_OMAP_COMMON
#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
#define CONFIG_OMAP 1 /* in a TI OMAP core */
#define CONFIG_OMAP34XX 1 /* which is a 34XX */
#define CONFIG_OMAP3_AM3517EVM 1 /* working with AM3517EVM */
+#define CONFIG_OMAP_COMMON
#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
#define CONFIG_OMAP34XX /* which is a 34XX */
#define CONFIG_OMAP_GPIO
#define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */
+#define CONFIG_OMAP_COMMON
#define CONFIG_SYS_TEXT_BASE 0x80008000
#define CONFIG_OMAP3_DEVKIT8000 1 /* working with DevKit8000 */
#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000
#define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
/*
* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
#define CONFIG_OMAP /* in a TI OMAP core */
#define CONFIG_OMAP34XX /* which is a 34XX */
#define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
#define CONFIG_SYS_TEXT_BASE 0x80008000
#define CONFIG_AM33XX
#define CONFIG_OMAP
+#define CONFIG_OMAP_COMMON
#include <asm/arch/omap.h>
#define CONFIG_OMAP 1 /* in a TI OMAP core */
#define CONFIG_OMAP34XX 1 /* which is a 34XX */
#define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
#define CONFIG_SDRC /* The chip has SDRC controller */
#define CONFIG_OMAP34XX /* which is a 34XX */
#define CONFIG_OMAP3_MCX /* working with mcx */
#define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
#define MACH_TYPE_MCX 3656
#define CONFIG_MACH_TYPE MACH_TYPE_MCX
#define CONFIG_OMAP3430 /* which is in a 3430 */
#define CONFIG_OMAP3_RX51 /* working with RX51 */
#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
+#define CONFIG_OMAP_COMMON
#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51
#define CONFIG_OMAP34XX 1 /* which is a 34XX */
#define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */
#define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
#define CONFIG_SDRC /* The chip has SDRC controller */
#define CONFIG_OMAP /* This is TI OMAP core */
#define CONFIG_OMAP34XX /* belonging to 34XX family */
#define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
#define CONFIG_SDRC /* The chip has SDRC controller */
#define CONFIG_OMAP34XX /* which is a 34XX */
#define CONFIG_OMAP3_LOGIC /* working with Logic OMAP boards */
#define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
#define CONFIG_SYS_TEXT_BASE 0x80400000
#define CONFIG_MVBLX 1 /* working with mvBlueLYNX-X */
#define CONFIG_MACH_TYPE MACH_TYPE_MVBLX
#define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
#define CONFIG_SDRC /* The chip has SDRC controller */
#define CONFIG_OMAP34XX /* which is a 34XX */
#define CONFIG_OMAP3_OVERO /* working with overo */
#define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
#define CONFIG_SDRC /* The chip has SDRC controller */
#define CONFIG_OMAP34XX 1 /* which is a 34XX */
#define CONFIG_OMAP3_PANDORA 1 /* working with pandora */
#define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
#define CONFIG_SDRC /* The chip has SDRC controller */
#define CONFIG_OMAP 1 /* in a TI OMAP core */
#define CONFIG_OMAP34XX 1 /* which is a 34XX */
#define CONFIG_OMAP3_3430SDP 1 /* working with SDP Rev2 */
+#define CONFIG_OMAP_COMMON
#define CONFIG_SDRC /* The chip has SDRC controller */
#define CONFIG_OMAP 1 /* in a TI OMAP core */
#define CONFIG_OMAP34XX 1 /* which is a 34XX */
#define CONFIG_OMAP3_ZOOM1 1 /* working with Zoom MDK Rev1 */
+#define CONFIG_OMAP_COMMON
#define CONFIG_SDRC /* The chip has SDRC controller */
#define CONFIG_OMAP34XX 1 /* which is a 34XX */
#define CONFIG_OMAP3_ZOOM2 1 /* working with Zoom II */
#define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
#define CONFIG_SDRC /* The chip has SDRC controller */
#define CONFIG_OMAP44XX 1 /* which is a 44XX */
#define CONFIG_OMAP4430 1 /* which is in a 4430 */
#define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
/* Get CPU defs */
#include <asm/arch/cpu.h>
#define CONFIG_OMAP /* in a TI OMAP core */
#define CONFIG_OMAP54XX /* which is a 54XX */
#define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
/* Get CPU defs */
#include <asm/arch/cpu.h>
#define CONFIG_AM33XX
#define CONFIG_OMAP
+#define CONFIG_OMAP_COMMON
#include <asm/arch/omap.h>
#define CONFIG_OMAP /* in a TI OMAP core */
#define CONFIG_OMAP34XX /* which is a 34XX */
#define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
#define CONFIG_SYS_TEXT_BASE 0x80008000
#define CONFIG_TI814X
#define CONFIG_SYS_NO_FLASH
#define CONFIG_OMAP
+#define CONFIG_OMAP_COMMON
#include <asm/arch/omap.h>
/* High Level Configuration Options */
#define CONFIG_OMAP /* in a TI OMAP core */
#define CONFIG_OMAP34XX /* which is a 34XX */
+#define CONFIG_OMAP_COMMON
#define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER
/*
LIBS-$(CONFIG_SPL_MUSB_NEW_SUPPORT) += drivers/usb/musb-new/libusb_musb-new.o
LIBS-$(CONFIG_SPL_USBETH_SUPPORT) += drivers/usb/gadget/libusb_gadget.o
-ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TI814X),)
+ifneq ($(CONFIG_OMAP_COMMON),)
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
endif
projects / u-boot / commitdiff