config TARGET_XILINX_PPC405_GENERIC
bool "Support xilinx-ppc405-generic"
+ select SUPPORT_SPL
+ select OF_CONTROL
+ select DM
+ select DM_SERIAL
config TARGET_XILINX_PPC440_GENERIC
bool "Support xilinx-ppc440-generic"
+ select SUPPORT_SPL
+ select OF_CONTROL
+ select DM
+ select DM_SERIAL
endchoice
return;
}
void get_sys_info(sys_info_t *) __attribute__((weak, alias("__get_sys_info")));
+
+int get_serial_clock(void){
+ return XPAR_UARTNS550_0_CLOCK_FREQ_HZ;
+}
#define XPAR_CORE_CLOCK_FREQ_HZ 400000000
#define XPAR_INTC_MAX_NUM_INTR_INPUTS 32
#define XPAR_SPI_0_NUM_TRANSFER_BITS 8
-#define XPAR_UARTNS550_0_BASEADDR 0xdeadbeef
#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ 100000000
#endif
return;
}
void get_sys_info(sys_info_t *) __attribute__((weak, alias("__get_sys_info")));
+
+int get_serial_clock(void){
+ return XPAR_UARTNS550_0_CLOCK_FREQ_HZ;
+}
#define XPAR_PLB_CLOCK_FREQ_HZ 100000000
#define XPAR_CORE_CLOCK_FREQ_HZ 400000000
#define XPAR_INTC_MAX_NUM_INTR_INPUTS 32
-#define XPAR_UARTNS550_0_BASEADDR 0xdeadbeef
#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ 100000000
#endif
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_NET is not set
# CONFIG_CMD_NFS is not set
+CONFIG_SYS_MALLOC_SIMPLE=y
+CONFIG_XILINX_UARTLITE=y
+CONFIG_SYS_NS16550=y
+CONFIG_OF_EMBED=y
+CONFIG_OF_CONTROL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_DEFAULT_DEVICE_TREE="xilinx-ppc440-generic"
CONFIG_TARGET_XILINX_PPC440_GENERIC=y
CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1"
CONFIG_SYS_PROMPT="board:/# "
-# CONFIG_CMD_IMLS is not set
-# CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_NET is not set
-# CONFIG_CMD_NFS is not set
+CONFIG_SYS_MALLOC_SIMPLE=y
+CONFIG_XILINX_UARTLITE=y
+CONFIG_SYS_NS16550=y
+CONFIG_OF_EMBED=y
+CONFIG_OF_CONTROL=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_DEFAULT_DEVICE_TREE="xilinx-ppc440-generic"
config XILINX_UARTLITE
bool "Xilinx Uarlite support"
- depends on DM_SERIAL && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP)
+ depends on DM_SERIAL && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || 4xx)
help
If you have a Xilinx based board and want to use the uartlite
serial ports, say Y to this option. If unsure, say N.
#define CONFIG_SYS_NO_FLASH
#endif
-/* serial communication */
-#ifdef XPAR_UARTLITE_0_BASEADDR
-#define CONFIG_XILINX_UARTLITE
-#define XILINX_UARTLITE_BASEADDR XPAR_UARTLITE_0_BASEADDR
-#define CONFIG_BAUDRATE XPAR_UARTLITE_0_BAUDRATE
-#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
-#else
-#ifdef XPAR_UARTNS550_0_BASEADDR
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 4
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_SYS_NS16550_COM1 XPAR_UARTNS550_0_BASEADDR
-#define CONFIG_SYS_NS16550_CLK XPAR_UARTNS550_0_CLOCK_FREQ_HZ
+#define CONFIG_OF_LIBFDT 1
#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 115200 }
-#endif
-#endif
+/* The following table includes the supported baudrates */
+# define CONFIG_SYS_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
#endif /* __CONFIG_H */