85xx boards: Rename CONFIG_DDR_DLL to CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN

This config option is for an erratum workaround; rename it to be more
clear.  Also, drop it from config files don't need it and were
undefining it.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index d73f3d7f14838afbe4e8822fe2c5a4e20c8504be..2d32532f2f4030904e75f4ebdfb7505819ed496b 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -46,6 +46,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #endif
 #if defined(CONFIG_SYS_P4080_ERRATUM_CPU22)
        puts("Work-around for Erratum CPU22 enabled\n");
+#endif
+#if defined(CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN)
+       puts("Work-around for DDR MSYNC_IN Erratum enabled\n");
 #endif
        return 0;
 }

diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index afa9ca978b61c2d390ab8e3ffdacf36246b4041b..4ef9be1b228e80389f33005c8f5dcc5caf0bf5bf 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -293,7 +293,7 @@ phys_size_t initdram(int board_type)
 {
        phys_size_t dram_size = 0;
 
-#if defined(CONFIG_DDR_DLL)
+#if defined(CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN)
        {
                ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
                unsigned int x = 10;

diff --git a/doc/README.mpc85xxads b/doc/README.mpc85xxads
index 046f981cf0d299695e1d7835e64a3662fdeff44b..d059a979817ff0e97d89d8f569a963c25bee7e67 100644 (file)
--- a/doc/README.mpc85xxads
+++ b/doc/README.mpc85xxads
@@ -144,8 +144,8 @@ Updated 13-July-2004 Jon Loeliger
                            also manual config the DDR after undef this
                            definition.
     CONFIG_DDR_ECC         only for ECC DDR module
-    CONFIG_DDR_DLL         DLL fix on some ADS boards needed for more
-                           stability.
+    CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN            DLL fix on some ADS boards needed
+                           for more stability.
     CONFIG_HAS_FEC         If an FEC is on chip, set to 1, else 0.
 
 Other than the above definitions, the rest in the config files are

diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 7473834c5ed54072da7c3925bb11d60b0eb3aeac..71ffba3e0861c8b84a584389f982ff5de6be9013 100644 (file)
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -144,7 +144,6 @@
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
-#undef CONFIG_DDR_DLL
 
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER      /* DDR controller or DMA? */
 #define CONFIG_MEM_INIT_VALUE  0xDeadBeef

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index b221a5cc9a9ec5f2139386f0a4f5e84a71d3f909..e5ac3a950410137d1b56568d8a6b8d788c8c172e 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -89,7 +89,7 @@ extern unsigned long get_clock_freq(void);
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
-#define CONFIG_DDR_DLL                 /* possible DLL fix needed */
+#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN    /* possible DLL fix needed */
 
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER      /* DDR controller or DMA? */
 #define CONFIG_MEM_INIT_VALUE  0xDeadBeef

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 9d2e209d69159160dcce3b56e2d675a2ba3ed218..8cdcbea7bcf7b560280028d1e186fdbb05b430b7 100644 (file)
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -131,7 +131,6 @@
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup */
 #define CONFIG_DDR_SPD
-#undef CONFIG_DDR_DLL
 
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
 #define CONFIG_MEM_INIT_VALUE  0xDeadBeef

diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 2dfee3d1bd0793812f7b2b21328f85f8dfc8fa00..d479a0985baa5a0043340aed3279d5718a267b09 100644 (file)
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -146,7 +146,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #undef CONFIG_SPD_EEPROM               /* Use SPD EEPROM for DDR setup */
-#undef CONFIG_DDR_DLL
 
 #define CONFIG_MEM_INIT_VALUE  0xDeadBeef
 

diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h
index fd9bacc499445a67e1e95f5cdab946d78b421a42..72559c0c023fb4491258fc796f3008e08939c862 100644 (file)
--- a/include/configs/SBC8540.h
+++ b/include/configs/SBC8540.h
@@ -118,7 +118,7 @@
 #undef  CONFIG_DDR_SPD
 
 #if defined(CONFIG_MPC85xx_REV1)
-  #define CONFIG_DDR_DLL                       /* possible DLL fix needed      */
+#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN    /* possible DLL fix needed */
 #endif
 
 #undef  CONFIG_DDR_ECC                     /* only for ECC DDR module */

diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index febe95da89c36767a11d1c655c6a31e41959f71a..79a958dc2aee4be940886be049afb29054a6b770 100644 (file)
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -162,7 +162,7 @@
 
 #if defined(CONFIG_TQM8540) || defined(CONFIG_TQM8560)
 /* TQM8540 & 8560 need DLL-override */
-#define CONFIG_DDR_DLL                         /* DLL fix needed       */
+#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN    /* possible DLL fix needed */
 #define CONFIG_DDR_DEFAULT_CL  25              /* CAS latency 2,5      */
 #endif /* CONFIG_TQM8540 || CONFIG_TQM8560 */
 

diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h
index 101c5d943d306f306074dea67f8cce6a431d1e96..435b148f3c39ec9c11f868dc474c00131d0af126 100644 (file)
--- a/include/configs/sbc8560.h
+++ b/include/configs/sbc8560.h
@@ -116,7 +116,7 @@
 #undef  CONFIG_DDR_SPD
 
 #if defined(CONFIG_MPC85xx_REV1)
-  #define CONFIG_DDR_DLL                       /* possible DLL fix needed      */
+#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN    /* possible DLL fix needed */
 #endif
 
 #undef  CONFIG_DDR_ECC                     /* only for ECC DDR module */

diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h
index c2497ad09c1266d374cf579e8ab60d697d1f6366..fc3881d22babd44f3cac1ebe2e868f32b60639fc 100644 (file)
--- a/include/configs/stxgp3.h
+++ b/include/configs/stxgp3.h
@@ -123,7 +123,7 @@
 #undef CONFIG_FSL_DDR_INTERACTIVE
 
 #undef  CONFIG_DDR_ECC                 /* only for ECC DDR module */
-#define CONFIG_DDR_DLL                  /* possible DLL fix needed */
+#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN    /* possible DLL fix needed */
 #define CONFIG_DDR_2T_TIMING           /* Sets the 2T timing bit */
 
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef

diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h
index 996120a02b1b022df4d8e1cf3f0d2abd8b29801b..d5dd94f55152a329e715152efde401b0f4b757e4 100644 (file)
--- a/include/configs/stxssa.h
+++ b/include/configs/stxssa.h
@@ -135,7 +135,6 @@
 #undef CONFIG_FSL_DDR_INTERACTIVE
 
 #undef CONFIG_DDR_ECC                  /* only for ECC DDR module */
-#undef CONFIG_DDR_DLL                  /* possible DLL fix needed */
 #define CONFIG_DDR_2T_TIMING           /* Sets the 2T timing bit */
 
 #define CONFIG_MEM_INIT_VALUE          0xDeadBeef