powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR

The CCSR relocation code in start.S writes to MAS7 on all e500 parts, but
that register does not exist on e500v1.

Signed-off-by: Timur Tabi <timur@freescale.com>

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 7bfa2d5630527fc4cf93e26d38f21a6e057f405d..8e99ef6c68828f3d8ee46b3c5d22eec9ac7af19d 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -443,13 +443,15 @@ create_ccsr_new_tlb:
        ori     r2, r2, FSL_BOOKE_MAS2(CONFIG_SYS_CCSRBAR, (MAS2_I|MAS2_G))@l
        lis     r3, FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_PHYS_LOW, 0, (MAS3_SW|MAS3_SR))@h
        ori     r3, r3, FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_PHYS_LOW, 0, (MAS3_SW|MAS3_SR))@l
+#ifdef CONFIG_ENABLE_36BIT_PHYS
        lis     r7, CONFIG_SYS_CCSRBAR_PHYS_HIGH@h
        ori     r7, r7, CONFIG_SYS_CCSRBAR_PHYS_HIGH@l
+       mtspr   MAS7, r7
+#endif
        mtspr   MAS0, r0
        mtspr   MAS1, r1
        mtspr   MAS2, r2
        mtspr   MAS3, r3
-       mtspr   MAS7, r7
        isync
        msync
        tlbwe
@@ -465,12 +467,14 @@ create_ccsr_old_tlb:
        ori     r2, r2, FSL_BOOKE_MAS2(CONFIG_SYS_CCSRBAR + 0x1000, (MAS2_I|MAS2_G))@l
        lis     r3, FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_DEFAULT, 0, (MAS3_SW|MAS3_SR))@h
        ori     r3, r3, FSL_BOOKE_MAS3(CONFIG_SYS_CCSRBAR_DEFAULT, 0, (MAS3_SW|MAS3_SR))@l
+#ifdef CONFIG_ENABLE_36BIT_PHYS
        li      r7, 0   /* The default CCSR address is always a 32-bit number */
+       mtspr   MAS7, r7
+#endif
        mtspr   MAS0, r0
        /* MAS1 is the same as above */
        mtspr   MAS2, r2
        mtspr   MAS3, r3
-       mtspr   MAS7, r7
        isync
        msync
        tlbwe