return (size);
}
+/*
+ * Early board initalization.
+ */
+int board_early_init_r(void)
+{
+ /* setup the UPIOx */
+ *(char *)(CFG_PIGGY_BASE + 0x02) = 0xc0;
+ *(char *)(CFG_PIGGY_BASE + 0x03) = 0x35;
+ return 0;
+}
+
#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
/*
* update "memory" property in the blob
}
/* BRG */
brg_data[0] = cpu_to_be32(bd->bi_busfreq);
- nodeoffset = fdt_path_offset (blob, "/soc866/cpm");
+ nodeoffset = fdt_path_offset (blob, "/soc/cpm");
if (nodeoffset >= 0) {
ret = fdt_setprop(blob, nodeoffset, "brg-frequency", brg_data,
sizeof(brg_data));
if (ret < 0)
- printf("ft_blob_update): cannot set /soc866/cpm/brg-frequency "
+ printf("ft_blob_update): cannot set /soc/cpm/brg-frequency "
"property err:%s\n", fdt_strerror(ret));
}
else {
/* memory node is required in dts */
- printf("ft_blob_update(): cannot find /localbus node "
+ printf("ft_blob_update(): cannot find /soc/cpm node "
"err:%s\n", fdt_strerror(nodeoffset));
}
/* MAC Adresse */
- nodeoffset = fdt_path_offset (blob, "/soc866/cpm/ethernet");
+ nodeoffset = fdt_path_offset (blob, "/soc/cpm/ethernet");
if (nodeoffset >= 0) {
ret = fdt_setprop(blob, nodeoffset, "mac-address", bd->bi_enetaddr,
sizeof(uchar) * 6);
if (ret < 0)
- printf("ft_blob_update): cannot set /soc866/cpm/scc/mac-address "
+ printf("ft_blob_update): cannot set /soc/cpm/scc/mac-address "
"property err:%s\n", fdt_strerror(ret));
}
else {
/* memory node is required in dts */
- printf("ft_blob_update(): cannot find /localbus node "
+ printf("ft_blob_update(): cannot find /soc/cpm/ethernet node "
"err:%s\n", fdt_strerror(nodeoffset));
}
}
#define CONFIG_MPC866 1 /* This is a MPC866 CPU */
#define CONFIG_MGSUVD 1 /* ...on a mgsuvd board */
+/* Do boardspecific init */
+#define CONFIG_BOARD_EARLY_INIT_R 1
+
#define CONFIG_8xx_GCLK_FREQ 66000000
#define CFG_SMC_UCODE_PATCH 1 /* Relocate SMC1 */
* 64 Refresh cycle in ms per number of rows
*/
#define CFG_PTA_PER_CLK ((4096 * 64 * 1000) / (4 * 64))
-/* HS HS noch zu setzen */
+
+/* GPIO/PIGGY on CS3 initialization values
+*/
+#define CFG_PIGGY_BASE (0x30000000)
+#define CFG_OR3_PRELIM (0xfe000d24)
+#define CFG_BR3_PRELIM (0x30000401)
/*
* Internal Definitions
#define CONFIG_OF_BOARD_SETUP 1
#define OF_CPU "PowerPC,866@0"
-#define OF_SOC "soc@f0000000"
+#define OF_SOC "soc@fff00000"
#define OF_TBCLK (bd->bi_busfreq / 4)
#define OF_STDOUT_PATH "/soc/cpm/serial@a80"