--- /dev/null
+#PBL preamble and RCW header
+aa55aa55 01ee0100
+
+#enable IFC, disable QSPI and DSPI
+0608000a 00000000 00000000 00000000
+20000000 00407900 60040a00 21046000
+00000000 00000000 00000000 00038000
+00080000 881b7340 00000000 00000000
+
+#disable IFC, enable QSPI and DSPI
+#0608000a 00000000 00000000 00000000
+#20000000 00407900 60040a00 21046000
+#00000000 00000000 00000000 00038000
+#20084800 881b7340 00000000 00000000
 
 #define CONFIG_SYS_CLK_FREQ            100000000
 #define CONFIG_DDR_CLK_FREQ            100000000
 
+#ifdef CONFIG_RAMBOOT_PBL
+#define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1021atwr/ls102xa_pbi.cfg
+#endif
+
+#ifdef CONFIG_SD_BOOT
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1021atwr/ls102xa_rcw_sd.cfg
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_LDSCRIPT    "arch/$(ARCH)/cpu/u-boot-spl.lds"
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_ENV_SUPPORT
+#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_WATCHDOG_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR                0xe8
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS             0x400
+
+#define CONFIG_SPL_TEXT_BASE           0x10000000
+#define CONFIG_SPL_MAX_SIZE            0x1a000
+#define CONFIG_SPL_STACK               0x1001d000
+#define CONFIG_SPL_PAD_TO              0x1c000
+#define CONFIG_SYS_TEXT_BASE           0x82000000
+
+#define CONFIG_SYS_SPL_MALLOC_START    0x80200000
+#define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000
+#define CONFIG_SPL_BSS_START_ADDR      0x80100000
+#define CONFIG_SPL_BSS_MAX_SIZE                0x80000
+#define CONFIG_SYS_MONITOR_LEN         0x80000
+#endif
+
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE           0x67f80000
 #endif
 
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_CMDLINE_EDITING
+
 #define CONFIG_CMD_IMLS
 
 #define CONFIG_HWCONFIG
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
+#else
 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
+#endif
 
 #define CONFIG_SYS_QE_FW_ADDR     0x67f40000
 
  */
 #define CONFIG_ENV_OVERWRITE
 
+#if defined(CONFIG_SD_BOOT)
+#define CONFIG_ENV_OFFSET              0x100000
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV         0
+#define CONFIG_ENV_SIZE                        0x20000
+#else
 #define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR                (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
 #define CONFIG_ENV_SIZE                        0x20000
 #define CONFIG_ENV_SECT_SIZE           0x20000 /* 128K (one sector) */
+#endif
 
 #define CONFIG_OF_LIBFDT
 #define CONFIG_OF_BOARD_SETUP