ARM: uniphier: rename CONFIG_MACH_* to CONFIG_ARCH_UNIPHIER_*

I want these prefixed with CONFIG_ARCH_UNIPHIER_ to clarify
they belong to UniPhier SoC family.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
index 28d574fbb806def2ff865beae8d380443d4d57b0..d7a19c6772ce18ddb61c43533e195462b6648351 100644 (file)
--- a/arch/arm/mach-uniphier/Kconfig
+++ b/arch/arm/mach-uniphier/Kconfig
@@ -8,20 +8,20 @@ config UNIPHIER_SMP
 
 choice
        prompt "UniPhier SoC select"
-       default MACH_PH1_PRO4
+       default ARCH_UNIPHIER_PH1_PRO4
 
-config MACH_PH1_SLD3
+config ARCH_UNIPHIER_PH1_SLD3
        bool "PH1-sLD3"
        select UNIPHIER_SMP
 
-config MACH_PH1_LD4
+config ARCH_UNIPHIER_PH1_LD4
        bool "PH1-LD4"
 
-config MACH_PH1_PRO4
+config ARCH_UNIPHIER_PH1_PRO4
        bool "PH1-Pro4"
        select UNIPHIER_SMP
 
-config MACH_PH1_SLD8
+config ARCH_UNIPHIER_PH1_SLD8
        bool "PH1-sLD8"
 
 endchoice
@@ -53,11 +53,11 @@ choice
 
 config DDR_FREQ_1600
        bool "DDR3 1600"
-       depends on MACH_PH1_SLD3 || MACH_PH1_LD4 || MACH_PH1_PRO4
+       depends on ARCH_UNIPHIER_PH1_SLD3 || ARCH_UNIPHIER_PH1_LD4 || ARCH_UNIPHIER_PH1_PRO4
 
 config DDR_FREQ_1333
        bool "DDR3 1333"
-       depends on MACH_PH1_SLD3 || MACH_PH1_LD4 || MACH_PH1_SLD8
+       depends on ARCH_UNIPHIER_PH1_SLD3 || ARCH_UNIPHIER_PH1_LD4 || ARCH_UNIPHIER_PH1_SLD8
 
 endchoice
 

diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile
index df6a569b9a495ba843c8f73e723b65958dec5c7a..d30cc27009bda9d52065a28d82b0f48b9cbd05af 100644 (file)
--- a/arch/arm/mach-uniphier/Makefile
+++ b/arch/arm/mach-uniphier/Makefile
@@ -31,7 +31,7 @@ obj-y += timer.o
 
 obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o
 
-obj-$(CONFIG_MACH_PH1_SLD3)    += ph1-sld3/
-obj-$(CONFIG_MACH_PH1_LD4)     += ph1-ld4/
-obj-$(CONFIG_MACH_PH1_PRO4)    += ph1-pro4/
-obj-$(CONFIG_MACH_PH1_SLD8)    += ph1-sld8/
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3)   += ph1-sld3/
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4)    += ph1-ld4/
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4)   += ph1-pro4/
+obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8)   += ph1-sld8/

diff --git a/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h b/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h
index fce0c01246b097f6b6bbe1a27709f9a4a99317ed..01f5c52c9c438707625d4751dab2e9fb8bd6fbf3 100644 (file)
--- a/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/ddrphy-regs.h
@@ -156,7 +156,8 @@ struct ddrphy {
 /* SoC-specific parameters */
 #define NR_DATX8_PER_DDRPHY    2
 
-#if defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \
+       defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
 #define NR_DDRPHY_PER_CH               1
 #else
 #define NR_DDRPHY_PER_CH               2

diff --git a/arch/arm/mach-uniphier/include/mach/sc-regs.h b/arch/arm/mach-uniphier/include/mach/sc-regs.h
index df502940779e42ad2417b9cc9618fc977ef189c0..9d697b16ee65e422bcd61903badc8fc6ca2dc58b 100644 (file)
--- a/arch/arm/mach-uniphier/include/mach/sc-regs.h
+++ b/arch/arm/mach-uniphier/include/mach/sc-regs.h
@@ -9,7 +9,7 @@
 #ifndef ARCH_SC_REGS_H
 #define ARCH_SC_REGS_H
 
-#if defined(CONFIG_MACH_PH1_SLD3)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
 #define SC_BASE_ADDR                   0xf1840000
 #else
 #define SC_BASE_ADDR                   0x61840000

diff --git a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c
index d693368816c8670fd6bc132e72edd25974ccdd55..8ae8ed65b87b3e8fbfd16a68e1f30a54e1cc1b4a 100644 (file)
--- a/arch/arm/mach-uniphier/ph1-pro4/pll_init.c
+++ b/arch/arm/mach-uniphier/ph1-pro4/pll_init.c
@@ -54,12 +54,10 @@ static void vpll_init(void)
        tmp = readl(SG_PINMON0);
        clk_mode_axosel = tmp & SG_PINMON0_CLK_MODE_AXOSEL_MASK;
 
-#if defined(CONFIG_MACH_PH1_PRO4)
        /* 25MHz or 6.25MHz is default for Pro4R, no need to set VPLLA/B */
        if (clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ ||
            clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_6250KHZ)
                return;
-#endif
 
        /* Disable write protect of VPLL27ACTRL[2-7]*, VPLL27BCTRL[2-8] */
        tmp = readl(SC_VPLL27ACTRL);

diff --git a/configs/ph1_ld4_defconfig b/configs/ph1_ld4_defconfig
index 899a7238f385c9e8cb34ce763081b0f2e5e18d05..e1665c090c88988ab3ed86fe9eadcbaabf887923 100644 (file)
--- a/configs/ph1_ld4_defconfig
+++ b/configs/ph1_ld4_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_UNIPHIER=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_MACH_PH1_LD4=y
+CONFIG_ARCH_UNIPHIER_PH1_LD4=y
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-ld4-ref"

diff --git a/configs/ph1_sld3_defconfig b/configs/ph1_sld3_defconfig
index 79ce0e28cde56320bc58087e01c691ab35cea79b..4b871d0ebd56e2acb53eb3174b54d2d33967ff38 100644 (file)
--- a/configs/ph1_sld3_defconfig
+++ b/configs/ph1_sld3_defconfig
@@ -1,6 +1,6 @@
 CONFIG_ARM=y
 CONFIG_ARCH_UNIPHIER=y
-CONFIG_MACH_PH1_SLD3=y
+CONFIG_ARCH_UNIPHIER_PH1_SLD3=y
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld3-ref"

diff --git a/configs/ph1_sld8_defconfig b/configs/ph1_sld8_defconfig
index 216d49be124e46de245a0adef5d5ae309503e4c8..00917fbc515af17c67c8dff57e47d017dd07c048 100644 (file)
--- a/configs/ph1_sld8_defconfig
+++ b/configs/ph1_sld8_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_UNIPHIER=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_MACH_PH1_SLD8=y
+CONFIG_ARCH_UNIPHIER_PH1_SLD8=y
 CONFIG_MICRO_SUPPORT_CARD=y
 CONFIG_SYS_TEXT_BASE=0x84000000
 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld8-ref"

diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig
index 757edce178f1b6e9186095a9fe908865bfaa2440..2ff616e9463bc1c5cb8b5e8fdc268d7a1a9fc39d 100644 (file)
--- a/drivers/pinctrl/uniphier/Kconfig
+++ b/drivers/pinctrl/uniphier/Kconfig
@@ -5,37 +5,37 @@ config PINCTRL_UNIPHIER_CORE
 
 config PINCTRL_UNIPHIER_PH1_LD4
        bool "UniPhier PH1-LD4 SoC pinctrl driver"
-       depends on MACH_PH1_LD4
+       depends on ARCH_UNIPHIER_PH1_LD4
        default y
        select PINCTRL_UNIPHIER_CORE
 
 config PINCTRL_UNIPHIER_PH1_PRO4
        bool "UniPhier PH1-Pro4 SoC pinctrl driver"
-       depends on MACH_PH1_PRO4
+       depends on ARCH_UNIPHIER_PH1_PRO4
        default y
        select PINCTRL_UNIPHIER_CORE
 
 config PINCTRL_UNIPHIER_PH1_SLD8
        bool "UniPhier PH1-sLD8 SoC pinctrl driver"
-       depends on MACH_PH1_SLD8
+       depends on ARCH_UNIPHIER_PH1_SLD8
        default y
        select PINCTRL_UNIPHIER_CORE
 
 config PINCTRL_UNIPHIER_PH1_PRO5
        bool "UniPhier PH1-Pro5 SoC pinctrl driver"
-       depends on MACH_PH1_PRO5
+       depends on ARCH_UNIPHIER_PH1_PRO5
        default y
        select PINCTRL_UNIPHIER_CORE
 
 config PINCTRL_UNIPHIER_PROXSTREAM2
        bool "UniPhier ProXstream2 SoC pinctrl driver"
-       depends on MACH_PROXSTREAM2
+       depends on ARCH_UNIPHIER_PROXSTREAM2
        default y
        select PINCTRL_UNIPHIER_CORE
 
 config PINCTRL_UNIPHIER_PH1_LD6B
        bool "UniPhier PH1-LD6b SoC pinctrl driver"
-       depends on MACH_PH1_LD6B
+       depends on ARCH_UNIPHIER_PH1_LD6B
        default y
        select PINCTRL_UNIPHIER_CORE
 

diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 64059612f329c8bfcc2e94243f5a3139e0db27e5..bd0769e6d92f6a609bab71a417d72fadd3dd45e3 100644 (file)
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -9,7 +9,7 @@
 #ifndef __CONFIG_UNIPHIER_COMMON_H__
 #define __CONFIG_UNIPHIER_COMMON_H__
 
-#if defined(CONFIG_MACH_PH1_SLD3)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
 #define CONFIG_DDR_NUM_CH0 2
 #define CONFIG_DDR_NUM_CH1 1
 #define CONFIG_DDR_NUM_CH2 1
@@ -23,7 +23,7 @@
 #define CONFIG_SDRAM2_SIZE     0x10000000
 #endif
 
-#if defined(CONFIG_MACH_PH1_LD4)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4)
 #define CONFIG_DDR_NUM_CH0 1
 #define CONFIG_DDR_NUM_CH1 1
 
@@ -34,7 +34,7 @@
 #define CONFIG_SDRAM1_SIZE     0x10000000
 #endif
 
-#if defined(CONFIG_MACH_PH1_PRO4)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
 #define CONFIG_DDR_NUM_CH0 2
 #define CONFIG_DDR_NUM_CH1 2
 
@@ -45,7 +45,7 @@
 #define CONFIG_SDRAM1_SIZE     0x20000000
 #endif
 
-#if defined(CONFIG_MACH_PH1_SLD8)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
 #define CONFIG_DDR_NUM_CH0 1
 #define CONFIG_DDR_NUM_CH1 1
 
@@ -175,7 +175,7 @@
 
 #define CONFIG_NAND_DENALI_ECC_SIZE                    1024
 
-#ifdef CONFIG_MACH_PH1_SLD3
+#ifdef CONFIG_ARCH_UNIPHIER_PH1_SLD3
 #define CONFIG_SYS_NAND_REGS_BASE                      0xf8100000
 #define CONFIG_SYS_NAND_DATA_BASE                      0xf8000000
 #else
@@ -291,11 +291,12 @@
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
 #define CONFIG_NR_DRAM_BANKS           2
 
-#if defined(CONFIG_MACH_PH1_SLD3) || defined(CONFIG_MACH_PH1_LD4) || \
-       defined(CONFIG_MACH_PH1_SLD8)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) || \
+       defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \
+       defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
 #define CONFIG_SPL_TEXT_BASE           0x00040000
 #endif
-#if defined(CONFIG_MACH_PH1_PRO4)
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
 #define CONFIG_SPL_TEXT_BASE           0x00100000
 #endif