Work around compiler bug in CCS5 by replacing the _call_swi() function with a #pragma...

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@1801 1d2547de-c912-0410-9cb9-b8ca96c0e9e2

diff --git a/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portmacro.h b/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portmacro.h
index 799933186dbd889da0d60987aa465ab14ea45975..b2315dfc22e56f93364ac96e2836b44caaa1675a 100644 (file)
--- a/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portmacro.h
+++ b/FreeRTOS/Source/portable/CCS/ARM_Cortex-R4/portmacro.h
@@ -111,11 +111,13 @@ extern void vPortExitCritical(void);
 #define portENABLE_INTERRUPTS()                asm( " CPSIE I" )\r
 \r
 /* Scheduler utilities. */\r
-#define portYIELD()                    _call_swi( 0 )\r
+#pragma SWI_ALIAS( vPortYield, 0 )\r
+extern void vPortYield( void );\r
+#define portYIELD()                    vPortYield()\r
 #define portSYS_SSIR1_REG                      ( * ( ( volatile unsigned long * ) 0xFFFFFFB0 ) )\r
 #define portSYS_SSIR1_SSKEY                    ( 0x7500UL )\r
 #define portYIELD_WITHIN_API()         { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY;  ( void ) portSYS_SSIR1_REG; }\r
-#define portYIELD_FROM_ISR()           { portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY;  ( void ) portSYS_SSIR1_REG; }\r
+#define portYIELD_FROM_ISR( x )                if( x != pdFALSE ){ portSYS_SSIR1_REG = portSYS_SSIR1_SSKEY;  ( void ) portSYS_SSIR1_REG; }\r
 \r
 /* Architecture specific optimisations. */\r
 #if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1\r