--- /dev/null
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+</projectOptions>\r
--- /dev/null
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--- /dev/null
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--- /dev/null
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+encoding//TMS570\ with\ FPU/Library/subdir_vars.mk=UTF-8\r
+encoding//TMS570\ with\ FPU/makefile=UTF-8\r
+encoding//TMS570\ with\ FPU/objects.mk=UTF-8\r
+encoding//TMS570\ with\ FPU/sources.mk=UTF-8\r
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+encoding//TMS570\ without\ FPU/FreeRTOS/subdir_rules.mk=UTF-8\r
+encoding//TMS570\ without\ FPU/FreeRTOS/subdir_vars.mk=UTF-8\r
+encoding//TMS570\ without\ FPU/Library/subdir_rules.mk=UTF-8\r
+encoding//TMS570\ without\ FPU/Library/subdir_vars.mk=UTF-8\r
+encoding//TMS570\ without\ FPU/makefile=UTF-8\r
+encoding//TMS570\ without\ FPU/objects.mk=UTF-8\r
+encoding//TMS570\ without\ FPU/sources.mk=UTF-8\r
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+encoding//TMS570\ without\ FPU/subdir_rules.mk=UTF-8\r
+encoding//TMS570\ without\ FPU/subdir_vars.mk=UTF-8\r
+encoding//With_FPU/Common-Demo-Source/subdir_rules.mk=UTF-8\r
+encoding//With_FPU/Common-Demo-Source/subdir_vars.mk=UTF-8\r
+encoding//With_FPU/FreeRTOS/portable/CCS/ARM_Cortex-R4/subdir_rules.mk=UTF-8\r
+encoding//With_FPU/FreeRTOS/portable/CCS/ARM_Cortex-R4/subdir_vars.mk=UTF-8\r
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+encoding//With_FPU/FreeRTOS/portable/MemMang/subdir_vars.mk=UTF-8\r
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+encoding//With_FPU/FreeRTOS/subdir_vars.mk=UTF-8\r
+encoding//With_FPU/Library/subdir_rules.mk=UTF-8\r
+encoding//With_FPU/Library/subdir_vars.mk=UTF-8\r
+encoding//With_FPU/RM48_FreeRTOS_Demo/source/subdir_rules.mk=UTF-8\r
+encoding//With_FPU/RM48_FreeRTOS_Demo/source/subdir_vars.mk=UTF-8\r
+encoding//With_FPU/makefile=UTF-8\r
+encoding//With_FPU/objects.mk=UTF-8\r
+encoding//With_FPU/sources.mk=UTF-8\r
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+encoding//With_FPU/subdir_rules.mk=UTF-8\r
+encoding//With_FPU/subdir_vars.mk=UTF-8\r
+encoding//Without_FPU/Common-Demo-Source/subdir_rules.mk=UTF-8\r
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+encoding//Without_FPU/FreeRTOS/subdir_rules.mk=UTF-8\r
+encoding//Without_FPU/FreeRTOS/subdir_vars.mk=UTF-8\r
+encoding//Without_FPU/Library/subdir_rules.mk=UTF-8\r
+encoding//Without_FPU/Library/subdir_vars.mk=UTF-8\r
+encoding//Without_FPU/RM48_FreeRTOS_Demo/source/subdir_rules.mk=UTF-8\r
+encoding//Without_FPU/RM48_FreeRTOS_Demo/source/subdir_vars.mk=UTF-8\r
+encoding//Without_FPU/makefile=UTF-8\r
+encoding//Without_FPU/objects.mk=UTF-8\r
+encoding//Without_FPU/sources.mk=UTF-8\r
+encoding//Without_FPU/startup/subdir_rules.mk=UTF-8\r
+encoding//Without_FPU/startup/subdir_vars.mk=UTF-8\r
+encoding//Without_FPU/subdir_rules.mk=UTF-8\r
+encoding//Without_FPU/subdir_vars.mk=UTF-8\r
--- /dev/null
+REM This file should be executed from the command line prior to the first\r
+REM build. It will be necessary to refresh the Eclipse project once the\r
+REM .bat file has been executed (normally just press F5 to refresh).\r
+\r
+REM Copies all the required files from their location within the standard\r
+REM FreeRTOS directory structure to under the Eclipse project directory.\r
+REM This permits the Eclipse project to be used in 'managed' mode and without\r
+REM having to setup any linked resources.\r
+\r
+REM Standard paths\r
+SET FREERTOS_SOURCE=..\..\Source\r
+SET COMMON_SOURCE=..\Common\minimal\r
+SET COMMON_INCLUDE=..\Common\include\r
+\r
+REM Have the files already been copied?\r
+IF EXIST .\FreeRTOS_Source Goto END\r
+\r
+ REM Create the required directory structure.\r
+ MD FreeRTOS\r
+ MD FreeRTOS\include\r
+ MD FreeRTOS\portable\r
+ MD FreeRTOS\portable\CCS\r
+ MD FreeRTOS\portable\CCS\ARM_Cortex-R4\r
+ MD FreeRTOS\portable\MemMang \r
+ MD Common-Demo-Source\r
+ MD Common-Demo-Source\include\r
+ \r
+ REM Copy the core kernel files into the project directory\r
+ copy %FREERTOS_SOURCE%\tasks.c FreeRTOS\r
+ copy %FREERTOS_SOURCE%\queue.c FreeRTOS\r
+ copy %FREERTOS_SOURCE%\list.c FreeRTOS\r
+ copy %FREERTOS_SOURCE%\timers.c FreeRTOS\r
+\r
+ REM Copy the common header files into the project directory\r
+ copy %FREERTOS_SOURCE%\include\*.* FreeRTOS\include\r
+ \r
+ REM Copy the portable layer files into the project directory\r
+ copy %FREERTOS_SOURCE%\portable\CCS\ARM_Cortex-R4\*.* FreeRTOS\portable\CCS\ARM_Cortex-R4\r
+ \r
+ REM Copy the memory allocation files into the project directory\r
+ copy %FREERTOS_SOURCE%\portable\MemMang\heap_4.c FreeRTOS\portable\MemMang\r
+\r
+ REM Copy the files that define the common demo tasks.\r
+ copy %COMMON_SOURCE%\dynamic.c Common-Demo-Source\r
+ copy %COMMON_SOURCE%\BlockQ.c Common-Demo-Source\r
+ copy %COMMON_SOURCE%\death.c Common-Demo-Source\r
+ copy %COMMON_SOURCE%\blocktim.c Common-Demo-Source\r
+ copy %COMMON_SOURCE%\semtest.c Common-Demo-Source\r
+ copy %COMMON_SOURCE%\PollQ.c Common-Demo-Source\r
+ copy %COMMON_SOURCE%\GenQTest.c Common-Demo-Source\r
+ copy %COMMON_SOURCE%\recmutex.c Common-Demo-Source\r
+ copy %COMMON_SOURCE%\countsem.c Common-Demo-Source\r
+ copy %COMMON_SOURCE%\integer.c Common-Demo-Source\r
+ copy %COMMON_SOURCE%\comtest.c Common-Demo-Source\r
+ \r
+ REM Copy the common demo file headers.\r
+ copy %COMMON_INCLUDE%\*.h Common-Demo-Source\include\r
+ \r
+: END\r
--- /dev/null
+/*\r
+ FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
+\r
+ FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT \r
+ http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+ \r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ \r
+ http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
+ and contact details. \r
+ \r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool.\r
+\r
+ Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
+ the code with commercial support, indemnification, and middleware, under \r
+ the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
+ provide a safety engineered and independently SIL3 certified version under \r
+ the SafeRTOS brand: http://www.SafeRTOS.com.\r
+*/\r
+\r
+/* \r
+ * The following #error directive is to remind users that a batch file must be\r
+ * executed prior to this project being built. Once it has been executed \r
+ * remove the #error line below.\r
+ */\r
+//#error Ensure CreateProjectDirectoryStructure.bat has been executed before building. See comment immediately above.\r
+\r
+\r
+#ifndef FREERTOS_CONFIG_H\r
+#define FREERTOS_CONFIG_H\r
+\r
+/*-----------------------------------------------------------\r
+ * Application specific definitions.\r
+ *\r
+ * These definitions should be adjusted for your particular hardware and\r
+ * application requirements.\r
+ *\r
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE\r
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. \r
+ *\r
+ * See http://www.freertos.org/a00110.html.\r
+ *----------------------------------------------------------*/\r
+\r
+#define configUSE_PREEMPTION 1\r
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1\r
+#define configUSE_IDLE_HOOK 1\r
+#define configUSE_TICK_HOOK 1\r
+#define configUSE_TRACE_FACILITY 0\r
+#define configUSE_16_BIT_TICKS 0\r
+#define configCPU_CLOCK_HZ ( ( unsigned portLONG ) 90000000 ) /* Timer clock. */\r
+#define configTICK_RATE_HZ ( ( portTickType ) 1000 )\r
+#define configMAX_PRIORITIES ( 8 )\r
+#define configMINIMAL_STACK_SIZE ( ( unsigned portSHORT ) 128 )\r
+#define configTOTAL_HEAP_SIZE ( ( size_t ) 32768 )\r
+#define configMAX_TASK_NAME_LEN ( 16 )\r
+#define configIDLE_SHOULD_YIELD 1\r
+#define configGENERATE_RUN_TIME_STATS 0\r
+#define configUSE_MALLOC_FAILED_HOOK 1\r
+\r
+#define configCHECK_FOR_STACK_OVERFLOW 2\r
+\r
+/* Co-routine definitions. */\r
+#define configUSE_CO_ROUTINES 0\r
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )\r
+\r
+/* Mutexes */\r
+#define configUSE_MUTEXES 1\r
+#define configUSE_RECURSIVE_MUTEXES 1\r
+\r
+/* Semaphores */\r
+#define configUSE_COUNTING_SEMAPHORES 1\r
+\r
+/* Timers */\r
+#define configUSE_TIMERS 1\r
+#define configTIMER_TASK_PRIORITY ( 2 )\r
+#define configTIMER_QUEUE_LENGTH 10\r
+#define configTIMER_TASK_STACK_DEPTH ( 128 )\r
+\r
+/* Set the following definitions to 1 to include the API function, or zero to exclude the API function. */\r
+#define INCLUDE_vTaskPrioritySet 1\r
+#define INCLUDE_uxTaskPriorityGet 1\r
+#define INCLUDE_vTaskDelete 1\r
+#define INCLUDE_vTaskCleanUpResources 0\r
+#define INCLUDE_vTaskSuspend 1\r
+#define INCLUDE_xTaskResumeFromISR 1\r
+#define INCLUDE_vTaskDelayUntil 1\r
+#define INCLUDE_vTaskDelay 1\r
+#define INCLUDE_xTaskGetSchedulerState 1\r
+#define INCLUDE_uxTaskGetStackHighWaterMark 1\r
+\r
+#define configASSERT( x ) if( ( x ) == pdFALSE ) { taskDISABLE_INTERRUPTS(); for( ;; ); }\r
+\r
+#endif /* FREERTOS_CONFIG_H */\r
--- /dev/null
+/** @file gio.c \r
+* @brief GIO Driver Inmplmentation File\r
+* @date 10.June.2010\r
+* @version 1.01.000\r
+*\r
+*/\r
+\r
+/* (c) Texas Instruments 2009-2010, All rights reserved. */\r
+\r
+\r
+#include "gio.h"\r
+\r
+\r
+/** @fn void gioInit(void)\r
+* @brief Initializes the GIO Driver\r
+*\r
+* This function initializes the GIO module and set the GIO ports \r
+* to the inital values.\r
+*/\r
+void gioInit(void)\r
+{\r
+ /** bring GIO module out of reset */\r
+ gioREG->GCR0 = 1;\r
+ gioREG->INTENACLR = 0xFF;\r
+ gioREG->LVLCLR = 0xFF; \r
+\r
+ /** @b initalise @b Port @b A */\r
+\r
+ /** - Port A output values */\r
+ gioPORTA->DOUT = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** - Port A direction */\r
+ gioPORTA->DIR = 1 /* Bit 0 */\r
+ | (1 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** - Port A open drain enable */\r
+ gioPORTA->PDR = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** - Port A pullup / pulldown selection */\r
+ gioPORTA->PSL = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** - Port A pullup / pulldown enable*/\r
+ gioPORTA->PULDIS = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** @b initalise @b Port @b B */\r
+\r
+ /** - Port B output values */\r
+ gioPORTB->DOUT = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** - Port B direction */\r
+ gioPORTB->DIR = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** - Port B open drain enable */\r
+ gioPORTB->PDR = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** - Port B pullup / pulldown selection */\r
+ gioPORTB->PSL = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** - Port B pullup / pulldown enable*/\r
+ gioPORTB->PULDIS = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+\r
+ /** @b initalise @b interrupts */\r
+\r
+ /** - interrupt polarity */\r
+ gioREG->POL = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+ /** - interrupt level */\r
+ gioREG->LVLSET = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+\r
+\r
+ /** - clear all pending interrupts */\r
+ gioREG->FLG = 0xFF;\r
+\r
+ /** - enable interrupts */\r
+ gioREG->INTENASET = 0 /* Bit 0 */\r
+ | (0 << 1) /* Bit 1 */\r
+ | (0 << 2) /* Bit 2 */\r
+ | (0 << 3) /* Bit 3 */\r
+ | (0 << 4) /* Bit 4 */\r
+ | (0 << 5) /* Bit 5 */\r
+ | (0 << 6) /* Bit 6 */\r
+ | (0 << 7); /* Bit 7 */\r
+}\r
+\r
+\r
+/** @fn void gioSetDirection(gioPORT_t *port, unsigned dir)\r
+* @brief Set Port Direction\r
+* @param[in] port pointer to GIO port:\r
+* - gioPORTA: PortA pointer\r
+* - gioPORTB: PortB pointer\r
+* @param[in] dir value to write to DIR register\r
+*\r
+* Set the direction of GIO pins at runtime.\r
+*/\r
+void gioSetDirection(gioPORT_t *port, unsigned dir)\r
+{\r
+ port->DIR = dir;\r
+}\r
+\r
+\r
+/** @fn void gioSetBit(gioPORT_t *port, unsigned bit, unsigned value)\r
+* @brief Write Bit\r
+* @param[in] port pointer to GIO port:\r
+* - gioPORTA: PortA pointer\r
+* - gioPORTB: PortB pointer\r
+* @param[in] bit number 0-7 that specifies the bit to be written to.\r
+* - 0: LSB\r
+* - 7: MSB\r
+* @param[in] value binrary value to write to bit\r
+*\r
+* Writes a value to the specified pin of the given GIO port\r
+*/\r
+void gioSetBit(gioPORT_t *port, unsigned bit, unsigned value)\r
+{\r
+ if (value)\r
+ {\r
+ port->DSET = 1 << bit;\r
+ }\r
+ else\r
+ {\r
+ port->DCLR = 1 << bit;\r
+ }\r
+}\r
+\r
+\r
+/** @fn void gioSetPort(gioPORT_t *port, unsigned value)\r
+* @brief Write Port Value\r
+* @param[in] port pointer to GIO port:\r
+* - gioPORTA: PortA pointer\r
+* - gioPORTB: PortB pointer\r
+* @param[in] value value to write to port\r
+*\r
+* Writes a value to all pin of a given GIO port\r
+*/\r
+void gioSetPort(gioPORT_t *port, unsigned value)\r
+{\r
+ port->DOUT = value;\r
+}\r
+\r
+\r
+/** @fn unsigned gioGetBit(gioPORT_t *port, unsigned bit)\r
+* @brief Read Bit\r
+* @param[in] port pointer to GIO port:\r
+* - gioPORTA: PortA pointer\r
+* - gioPORTB: PortB pointer\r
+* @param[in] bit number 0-7 that specifies the bit to be written to.\r
+* - 0: LSB\r
+* - 7: MSB\r
+*\r
+* Reads a the current value from the specified pin of the given GIO port\r
+*/\r
+unsigned gioGetBit(gioPORT_t *port, unsigned bit)\r
+{\r
+ return (port->DIN >> bit) & 1U;\r
+}\r
+\r
+\r
+/** @fn unsigned gioGetPort(gioPORT_t *port)\r
+* @brief Read Port Value\r
+* @param[in] port pointer to GIO port:\r
+* - gioPORTA: PortA pointer\r
+* - gioPORTB: PortB pointer\r
+*\r
+* Reads a the current value of a given GIO port\r
+*/\r
+unsigned gioGetPort(gioPORT_t *port)\r
+{\r
+ return port->DIN;\r
+}\r
+\r
+\r
+/** @fn void gioEnableNotification(unsigned bit)\r
+* @brief Enable Interrupt\r
+* @param[in] bit interrupt pin to enable\r
+* - 0: LSB\r
+* - 7: MSB\r
+*\r
+* Enables an innterrupt pin of PortA\r
+*/\r
+void gioEnableNotification(unsigned bit)\r
+{\r
+ gioREG->INTENASET = 1 << bit;\r
+}\r
+\r
+\r
+/** @fn void gioDisableNotification(unsigned bit)\r
+* @brief Disable Interrupt\r
+* @param[in] bit interrupt pin to enable\r
+* - 0: LSB\r
+* - 7: MSB\r
+*\r
+* Disables an innterrupt pin of PortA\r
+*/\r
+void gioDisableNotification(unsigned bit)\r
+{\r
+ gioREG->INTENACLR = 1 << bit;\r
+}\r
--- /dev/null
+/** @file gio.h\r
+* @brief GIO Driver Definition File\r
+* @date 11.August.2009\r
+* @version 1.01.000\r
+* \r
+*/\r
+\r
+/* (c) Texas Instruments 2009-2010, All rights reserved. */\r
+\r
+\r
+#ifndef __GIO_H__\r
+#define __GIO_H__\r
+\r
+/** @struct gioBase\r
+* @brief GIO Base Register Definition\r
+*\r
+* This structure is used to access the GIO module egisters.\r
+*/\r
+/** @typedef gioBASE_t\r
+* @brief GIO Register Frame Type Definition\r
+*\r
+* This type is used to access the GIO Registers.\r
+*/\r
+typedef volatile struct gioBase\r
+{\r
+ unsigned GCR0; /**< 0x0000: Global Control Register */\r
+ unsigned PWDN; /**< 0x0004: Power Down Register */\r
+ unsigned INTDET; /**< 0x0008: Interrupt Detect Regsiter*/\r
+ unsigned POL; /**< 0x000C: Interrupt Polarity Register */\r
+ unsigned INTENASET; /**< 0x0010: Interrupt Enable Set Register */\r
+ unsigned INTENACLR; /**< 0x0014: Interrupt Enable Clear Register */\r
+ unsigned LVLSET; /**< 0x0018: Interrupt Priority Set Register */\r
+ unsigned LVLCLR; /**< 0x001C: Interrupt Priority Clear Register */\r
+ unsigned FLG; /**< 0x0020: Interrupt Flag Register */\r
+ unsigned OFFSET0; /**< 0x0024: Interrupt Offset A Register */\r
+ unsigned OFFSET1; /**< 0x0028: Interrupt Offset B Register */\r
+} gioBASE_t;\r
+\r
+\r
+/** @struct gioPort\r
+* @brief GIO Port Register Definition\r
+*/\r
+/** @typedef gioPORT_t\r
+* @brief GIO Port Register Type Definition\r
+*\r
+* This type is used to access the GIO Port Registers.\r
+*/\r
+typedef volatile struct gioPort\r
+{\r
+ unsigned DIR; /**< 0x0000: Data Direction Register */\r
+ unsigned DIN; /**< 0x0004: Data Input Register */\r
+ unsigned DOUT; /**< 0x0008: Data Output Register */\r
+ unsigned DSET; /**< 0x000C: Data Output Set Register */\r
+ unsigned DCLR; /**< 0x0010: Data Output Clear Register */\r
+ unsigned PDR; /**< 0x0014: Open Drain Regsiter */\r
+ unsigned PULDIS; /**< 0x0018: Pullup Disable Register */\r
+ unsigned PSL; /**< 0x001C: Pull Up/Down Selection Register */\r
+} gioPORT_t;\r
+\r
+\r
+/** @def gioREG\r
+* @brief GIO Register Frame Pointer\r
+*\r
+* This pointer is used by the GIO driver to access the gio module registers.\r
+*/\r
+#define gioREG ((gioBASE_t *)0xFFF7BC00U)\r
+\r
+/** @def gioPORTA\r
+* @brief GIO Port (A) Register Pointer\r
+*\r
+* Pointer used by the GIO driver to access PORTA\r
+*/\r
+#define gioPORTA ((gioPORT_t *)0xFFF7BC34U)\r
+\r
+/** @def gioPORTB\r
+* @brief GIO Port (B) Register Pointer\r
+*\r
+* Pointer used by the GIO driver to access PORTB\r
+*/\r
+#define gioPORTB ((gioPORT_t *)0xFFF7BC54U)\r
+\r
+\r
+/* GIO Interface Functions */\r
+void gioInit(void);\r
+void gioSetDirection(gioPORT_t *port, unsigned dir);\r
+void gioSetBit(gioPORT_t *port, unsigned bit, unsigned value);\r
+void gioSetPort(gioPORT_t *port, unsigned value);\r
+unsigned gioGetBit(gioPORT_t *port, unsigned bit);\r
+unsigned gioGetPort(gioPORT_t *port);\r
+void gioEnableNotification(unsigned bit);\r
+void gioDisableNotification(unsigned bit);\r
+void gioNotification(int bit);\r
+\r
+#endif\r
--- /dev/null
+/*\r
+ FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+#include "FreeRTOS.h"\r
+#include "Task.h"\r
+#include "gio.h"\r
+#include "het.h"\r
+\r
+/*\r
+ * Task that flashes the LEDS on the USB stick.\r
+ *\r
+ * This task is also run in Thumb mode to test the ARM/THUMB context switch\r
+ */\r
+\r
+#pragma TASK(vLedTask)\r
+#pragma CODE_STATE(vLedTask, 16)\r
+\r
+void vLedTask(void *pvParameters)\r
+{\r
+ unsigned led = 0;\r
+ unsigned count = 0;\r
+ unsigned colour = 0;\r
+\r
+ /* Initalise the IO ports that drive the LEDs */\r
+ gioSetDirection(hetPORT, 0xFFFFFFFF);\r
+ /* switch all leds off */\r
+ gioSetPort(hetPORT, 0x08110034);\r
+\r
+ for(;;)\r
+ {\r
+ /* toggle on/off */\r
+ led ^= 1;\r
+ /* switch TOP row */\r
+ gioSetBit(hetPORT, 25, led);\r
+ gioSetBit(hetPORT, 18, led);\r
+ gioSetBit(hetPORT, 29, led);\r
+ /* switch BOTTOM row */\r
+ gioSetBit(hetPORT, 17, led ^ 1);\r
+ gioSetBit(hetPORT, 31, led ^ 1);\r
+ gioSetBit(hetPORT, 0, led ^ 1);\r
+ vTaskDelay(500);\r
+\r
+ if (++count > 5)\r
+ {\r
+ count = 0;\r
+ /* both leds to off */\r
+ gioSetBit(hetPORT, 2, 1); gioSetBit(hetPORT, 5, 1); gioSetBit(hetPORT, 20, 1);\r
+ gioSetBit(hetPORT, 4, 1); gioSetBit(hetPORT, 27, 1); gioSetBit(hetPORT, 16, 1);\r
+ switch(colour)\r
+ {\r
+ case 0:\r
+ gioSetBit(hetPORT, 2, 0); /* red */\r
+ gioSetBit(hetPORT, 4, 0);\r
+ colour++;\r
+ continue;\r
+ case 1:\r
+ gioSetBit(hetPORT, 5, 0); /* blue */\r
+ gioSetBit(hetPORT, 27, 0);\r
+ colour++;\r
+ continue;\r
+ case 2:\r
+ gioSetBit(hetPORT, 20, 0); /* green */\r
+ gioSetBit(hetPORT, 16, 0);\r
+ colour++;\r
+ continue;\r
+ }\r
+ colour = 0;\r
+ }\r
+ }\r
+}\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V7.0.2 - Copyright (C) 2011 Real Time Engineers Ltd.\r
+\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+\r
+ http://www.FreeRTOS.org - Documentation, latest information, license and\r
+ contact details.\r
+\r
+ http://www.SafeRTOS.com - A version that is certified for use in safety\r
+ critical systems.\r
+\r
+ http://www.OpenRTOS.com - Commercial support, development, porting,\r
+ licensing and training services.\r
+*/\r
+\r
+\r
+#ifndef __HET_H__\r
+#define __HET_H__\r
+\r
+#include "gio.h"\r
+\r
+/** @struct hetBase\r
+* @brief HET Register Definition\r
+*\r
+* This structure is used to access the HET module egisters.\r
+*/\r
+/** @typedef hetBASE_t\r
+* @brief HET Register Frame Type Definition\r
+*\r
+* This type is used to access the HET Registers.\r
+*/\r
+typedef volatile struct hetBase\r
+{\r
+ unsigned GCR; /**< 0x0000: Global control register */\r
+ unsigned PFR; /**< 0x0004: Prescale factor register */\r
+ unsigned ADDR; /**< 0x0008: Current address register */\r
+ unsigned OFF1; /**< 0x000C: Interrupt offset register 1 */\r
+ unsigned OFF2; /**< 0x0010: Interrupt offset register 2 */\r
+ unsigned INTENAS; /**< 0x0014: Interrupt enable set register */\r
+ unsigned INTENAC; /**< 0x0018: Interrupt enable clear register */\r
+ unsigned EXC1; /**< 0x001C: Exeption control register 1 */\r
+ unsigned EXC2; /**< 0x0020: Exeption control register 2 */\r
+ unsigned PRY; /**< 0x0024: Interrupt priority register */\r
+ unsigned FLG; /**< 0x0028: Interrupt flag register */\r
+ unsigned : 32U; /**< 0x002C: Reserved */\r
+ unsigned : 32U; /**< 0x0030: Reserved */\r
+ unsigned HRSH; /**< 0x0034: High resoltion share register */\r
+ unsigned XOR; /**< 0x0038: XOR share register */\r
+ unsigned REQENS; /**< 0x003C: Request enable set register */\r
+ unsigned REQENC; /**< 0x0040: Request enable clear register */\r
+ unsigned REQDS; /**< 0x0044: Request destination select register */\r
+ unsigned : 32U; /**< 0x0048: Reserved */\r
+ unsigned DIR; /**< 0x004C: Direction register */\r
+ unsigned DIN; /**< 0x0050: Data input register */\r
+ unsigned DOUT; /**< 0x0054: Data output register */\r
+ unsigned DSET; /**< 0x0058: Data output set register */\r
+ unsigned DCLR; /**< 0x005C: Data output clear register */\r
+ unsigned PDR; /**< 0x0060: Open drain register */\r
+ unsigned PULDIS; /**< 0x0064: Pull disable register */\r
+ unsigned PSL; /**< 0x0068: Pull select register */\r
+ unsigned : 32U; /**< 0x006C: Reserved */\r
+ unsigned : 32U; /**< 0x0070: Reserved */\r
+ unsigned PCREG; /**< 0x0074: Parity control register */\r
+ unsigned PAR; /**< 0x0078: Parity address register */\r
+ unsigned PPR; /**< 0x007C: Parity pin select register */\r
+ unsigned SFPRLD; /**< 0x0080: Suppression filter preload register */\r
+ unsigned SFENA; /**< 0x0084: Suppression filter enable register */\r
+ unsigned : 32U; /**< 0x0088: Reserved */\r
+ unsigned LBPSEL; /**< 0x008C: Loop back pair select register */\r
+ unsigned LBPDIR; /**< 0x0090: Loop back pair direction register */\r
+} hetBASE_t;\r
+\r
+\r
+/** @def hetREG\r
+* @brief HET Register Frame Pointer\r
+*\r
+* This pointer is used by the HET driver to access the het module registers.\r
+*/\r
+#define hetREG ((hetBASE_t *)0xFFF7B800U)\r
+\r
+\r
+/** @def hetPORT\r
+* @brief HET GIO Port Register Pointer\r
+*\r
+* Pointer used by the GIO driver to access I/O PORT of HET\r
+* (use the GIO drivers to access the port pins).\r
+*/\r
+#define hetPORT ((gioPORT_t *)0xFFF7B84CU)\r
+\r
+#endif\r
--- /dev/null
+/*\r
+ FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
+\r
+ FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT \r
+ http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+ \r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ \r
+ http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
+ and contact details. \r
+ \r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool.\r
+\r
+ Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
+ the code with commercial support, indemnification, and middleware, under \r
+ the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
+ provide a safety engineered and independently SIL3 certified version under \r
+ the SafeRTOS brand: http://www.SafeRTOS.com.\r
+*/\r
+\r
+/*-----------------------------------------------------------\r
+ * Simple IO routines to control the LEDs.\r
+ *-----------------------------------------------------------*/\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Demo includes. */\r
+#include "partest.h"\r
+\r
+/* Library includes. */\r
+#include "het.h"\r
+\r
+/* Port bits connected to LEDs. */\r
+const unsigned long ulLEDBits[] = { 25, 18, 29, /* Bottom row. */\r
+ 17, 31, 0, /* Top row. */\r
+ 2, 5, 20, /* Red1, blue1, green1 */\r
+ 4, 27, 16 }; /* Red2, blue2, green2 */\r
+\r
+/* 1 turns a white LED on, or a coloured LED off. */\r
+const unsigned long ulOnStates[] = { 1, 1, 1,\r
+ 1, 1, 1,\r
+ 0, 0, 0,\r
+ 0, 0, 0 };\r
+\r
+const unsigned long ulNumLEDs = sizeof( ulLEDBits ) / sizeof( unsigned long );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestInitialise( void )\r
+{\r
+unsigned long ul;\r
+\r
+ /* Initalise the IO ports that drive the LEDs */\r
+ gioSetDirection( hetPORT, 0xFFFFFFFF );\r
+\r
+ /* Turn all the LEDs off. */\r
+ for( ul = 0; ul < ulNumLEDs; ul++ )\r
+ {\r
+ gioSetBit( hetPORT, ulLEDBits[ ul ], !ulOnStates[ ul ] );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestSetLED( unsigned long ulLED, signed long xValue )\r
+{ \r
+ if( ulLED < ulNumLEDs )\r
+ {\r
+ if( xValue == pdFALSE )\r
+ {\r
+ xValue = !ulOnStates[ ulLED ];\r
+ }\r
+ else\r
+ {\r
+ xValue = ulOnStates[ ulLED ];\r
+ }\r
+\r
+ gioSetBit( hetPORT, ulLEDBits[ ulLED ], xValue );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vParTestToggleLED( unsigned long ulLED )\r
+{\r
+unsigned long ulBitState;\r
+\r
+ if( ulLED < ulNumLEDs )\r
+ {\r
+ ulBitState = gioGetBit( hetPORT, ulLEDBits[ ulLED ] );\r
+ gioSetBit( hetPORT, ulLEDBits[ ulLED ], !ulBitState );\r
+ }\r
+}\r
+ \r
+\r
+\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
+<configurations XML_version="1.2" id="configurations_0">\r
+ <configuration XML_version="1.2" id="configuration_0">\r
+ <instance XML_version="1.2" desc="Texas Instruments XDS100v2 USB Emulator" href="connections/TIXDS100v2_Connection.xml" id="Texas Instruments XDS100v2 USB Emulator" xml="TIXDS100v2_Connection.xml" xmlpath="connections"/>\r
+ <connection XML_version="1.2" id="Texas Instruments XDS100v2 USB Emulator">\r
+ <instance XML_version="1.2" href="drivers/tixds100v2icepick_c.xml" id="drivers" xml="tixds100v2icepick_c.xml" xmlpath="drivers"/>\r
+ <instance XML_version="1.2" href="drivers/tixds100v2cs_dap.xml" id="drivers" xml="tixds100v2cs_dap.xml" xmlpath="drivers"/>\r
+ <instance XML_version="1.2" href="drivers/tixds100v2cortexR.xml" id="drivers" xml="tixds100v2cortexR.xml" xmlpath="drivers"/>\r
+ <platform XML_version="1.2" id="platform_0">\r
+ <instance XML_version="1.2" desc="RM48L950" href="devices/rm48l950.xml" id="RM48L950" xml="rm48l950.xml" xmlpath="devices"/>\r
+ </platform>\r
+ </connection>\r
+ </configuration>\r
+</configurations>\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>\r
+<configurations XML_version="1.2" id="configurations_0">\r
+ <configuration XML_version="1.2" id="configuration_0">\r
+ <instance XML_version="1.2" desc="Texas Instruments XDS100v2 USB Emulator" href="connections/TIXDS100v2_Connection.xml" id="Texas Instruments XDS100v2 USB Emulator" xml="TIXDS100v2_Connection.xml" xmlpath="connections"/>\r
+ <connection XML_version="1.2" id="Texas Instruments XDS100v2 USB Emulator">\r
+ <instance XML_version="1.2" href="drivers/tixds100v2icepick_c.xml" id="drivers" xml="tixds100v2icepick_c.xml" xmlpath="drivers"/>\r
+ <instance XML_version="1.2" href="drivers/tixds100v2cs_dap.xml" id="drivers" xml="tixds100v2cs_dap.xml" xmlpath="drivers"/>\r
+ <instance XML_version="1.2" href="drivers/tixds100v2cortexR.xml" id="drivers" xml="tixds100v2cortexR.xml" xmlpath="drivers"/>\r
+ <platform XML_version="1.2" id="platform_0">\r
+ <instance XML_version="1.2" desc="TMS570LS3137" href="devices/tms570ls3137.xml" id="TMS570LS3137" xml="tms570ls3137.xml" xmlpath="devices"/>\r
+ </platform>\r
+ </connection>\r
+ </configuration>\r
+</configurations>\r
--- /dev/null
+/*\r
+ FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
+\r
+ FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT \r
+ http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+ \r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ \r
+ http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
+ and contact details. \r
+ \r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool.\r
+\r
+ Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
+ the code with commercial support, indemnification, and middleware, under \r
+ the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
+ provide a safety engineered and independently SIL3 certified version under \r
+ the SafeRTOS brand: http://www.SafeRTOS.com.\r
+*/\r
+\r
+/*\r
+ * Creates eight tasks, each of which loops continuously performing an (emulated) \r
+ * floating point calculation.\r
+ *\r
+ * All the tasks run at the idle priority and never block or yield. This causes \r
+ * all eight tasks to time slice with the idle task. Running at the idle priority \r
+ * means that these tasks will get pre-empted any time another task is ready to run\r
+ * or a time slice occurs. More often than not the pre-emption will occur mid \r
+ * calculation, creating a good test of the schedulers context switch mechanism - a \r
+ * calculation producing an unexpected result could be a symptom of a corruption in \r
+ * the context of a task.\r
+ */\r
+\r
+#include <stdlib.h>\r
+#include <math.h>\r
+\r
+/* Scheduler include files. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Demo program include files. */\r
+#include "flop.h"\r
+\r
+#define mathSTACK_SIZE configMINIMAL_STACK_SIZE\r
+#define mathNUMBER_OF_TASKS ( 8 )\r
+\r
+/* Four tasks, each of which performs a different floating point calculation. \r
+Each of the four is created twice. */\r
+static portTASK_FUNCTION_PROTO( vCompetingMathTask1, pvParameters );\r
+static portTASK_FUNCTION_PROTO( vCompetingMathTask2, pvParameters );\r
+static portTASK_FUNCTION_PROTO( vCompetingMathTask3, pvParameters );\r
+static portTASK_FUNCTION_PROTO( vCompetingMathTask4, pvParameters );\r
+\r
+/* These variables are used to check that all the tasks are still running. If a \r
+task gets a calculation wrong it will\r
+stop incrementing its check variable. */\r
+static volatile unsigned short usTaskCheck[ mathNUMBER_OF_TASKS ] = { ( unsigned short ) 0 };\r
+\r
+/* Must be called before any hardware floating point operations are\r
+performed to let the RTOS portable layer know that this task requires\r
+a floating point context. */\r
+#if __TI_VFP_SUPPORT__\r
+ extern void vPortTaskUsesFPU( void );\r
+#endif\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void vStartMathTasks( unsigned portBASE_TYPE uxPriority )\r
+{\r
+ xTaskCreate( vCompetingMathTask1, ( signed char * ) "Math1", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 0 ] ), uxPriority, NULL );\r
+ xTaskCreate( vCompetingMathTask2, ( signed char * ) "Math2", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 1 ] ), uxPriority, NULL );\r
+ xTaskCreate( vCompetingMathTask3, ( signed char * ) "Math3", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 2 ] ), uxPriority, NULL );\r
+ xTaskCreate( vCompetingMathTask4, ( signed char * ) "Math4", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 3 ] ), uxPriority, NULL );\r
+ xTaskCreate( vCompetingMathTask1, ( signed char * ) "Math5", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 4 ] ), uxPriority, NULL );\r
+ xTaskCreate( vCompetingMathTask2, ( signed char * ) "Math6", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 5 ] ), uxPriority, NULL );\r
+ xTaskCreate( vCompetingMathTask3, ( signed char * ) "Math7", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 6 ] ), uxPriority, NULL );\r
+ xTaskCreate( vCompetingMathTask4, ( signed char * ) "Math8", mathSTACK_SIZE, ( void * ) &( usTaskCheck[ 7 ] ), uxPriority, NULL );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static portTASK_FUNCTION( vCompetingMathTask1, pvParameters )\r
+{\r
+volatile portDOUBLE d1, d2, d3, d4;\r
+volatile unsigned short *pusTaskCheckVariable;\r
+volatile portDOUBLE dAnswer;\r
+short sError = pdFALSE;\r
+\r
+\r
+ /* Must be called before any hardware floating point operations are\r
+ performed to let the RTOS portable layer know that this task requires\r
+ a floating point context. */\r
+ #if __TI_VFP_SUPPORT__\r
+ vPortTaskUsesFPU();\r
+ #endif\r
+\r
+ d1 = 123.4567;\r
+ d2 = 2345.6789;\r
+ d3 = -918.222;\r
+\r
+ dAnswer = ( d1 + d2 ) * d3;\r
+\r
+ /* The variable this task increments to show it is still running is passed in \r
+ as the parameter. */\r
+ pusTaskCheckVariable = ( unsigned short * ) pvParameters;\r
+\r
+ /* Keep performing a calculation and checking the result against a constant. */\r
+ for(;;)\r
+ {\r
+ d1 = 123.4567;\r
+ d2 = 2345.6789;\r
+ d3 = -918.222;\r
+\r
+ d4 = ( d1 + d2 ) * d3;\r
+\r
+ #if configUSE_PREEMPTION == 0\r
+ taskYIELD();\r
+ #endif\r
+\r
+ /* If the calculation does not match the expected constant, stop the \r
+ increment of the check variable. */\r
+ if( fabs( d4 - dAnswer ) > 0.001 )\r
+ {\r
+ sError = pdTRUE;\r
+ }\r
+\r
+ if( sError == pdFALSE )\r
+ {\r
+ /* If the calculation has always been correct, increment the check \r
+ variable so we know this task is still running okay. */\r
+ ( *pusTaskCheckVariable )++;\r
+ }\r
+\r
+ #if configUSE_PREEMPTION == 0\r
+ taskYIELD();\r
+ #endif\r
+\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static portTASK_FUNCTION( vCompetingMathTask2, pvParameters )\r
+{\r
+volatile portDOUBLE d1, d2, d3, d4;\r
+volatile unsigned short *pusTaskCheckVariable;\r
+volatile portDOUBLE dAnswer;\r
+short sError = pdFALSE;\r
+\r
+ /* Must be called before any hardware floating point operations are\r
+ performed to let the RTOS portable layer know that this task requires\r
+ a floating point context. */\r
+ #if __TI_VFP_SUPPORT__\r
+ vPortTaskUsesFPU();\r
+ #endif\r
+\r
+ d1 = -389.38;\r
+ d2 = 32498.2;\r
+ d3 = -2.0001;\r
+\r
+ dAnswer = ( d1 / d2 ) * d3;\r
+\r
+\r
+ /* The variable this task increments to show it is still running is passed in \r
+ as the parameter. */\r
+ pusTaskCheckVariable = ( unsigned short * ) pvParameters;\r
+\r
+ /* Keep performing a calculation and checking the result against a constant. */\r
+ for( ;; )\r
+ {\r
+ d1 = -389.38;\r
+ d2 = 32498.2;\r
+ d3 = -2.0001;\r
+\r
+ d4 = ( d1 / d2 ) * d3;\r
+\r
+ #if configUSE_PREEMPTION == 0\r
+ taskYIELD();\r
+ #endif\r
+ \r
+ /* If the calculation does not match the expected constant, stop the \r
+ increment of the check variable. */\r
+ if( fabs( d4 - dAnswer ) > 0.001 )\r
+ {\r
+ sError = pdTRUE;\r
+ }\r
+\r
+ if( sError == pdFALSE )\r
+ {\r
+ /* If the calculation has always been correct, increment the check \r
+ variable so we know\r
+ this task is still running okay. */\r
+ ( *pusTaskCheckVariable )++;\r
+ }\r
+\r
+ #if configUSE_PREEMPTION == 0\r
+ taskYIELD();\r
+ #endif\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static portTASK_FUNCTION( vCompetingMathTask3, pvParameters )\r
+{\r
+volatile portDOUBLE *pdArray, dTotal1, dTotal2, dDifference;\r
+volatile unsigned short *pusTaskCheckVariable;\r
+const size_t xArraySize = 10;\r
+size_t xPosition;\r
+short sError = pdFALSE;\r
+\r
+ /* Must be called before any hardware floating point operations are\r
+ performed to let the RTOS portable layer know that this task requires\r
+ a floating point context. */\r
+ #if __TI_VFP_SUPPORT__\r
+ vPortTaskUsesFPU();\r
+ #endif\r
+\r
+ /* The variable this task increments to show it is still running is passed in \r
+ as the parameter. */\r
+ pusTaskCheckVariable = ( unsigned short * ) pvParameters;\r
+\r
+ pdArray = ( portDOUBLE * ) pvPortMalloc( xArraySize * sizeof( portDOUBLE ) );\r
+\r
+ /* Keep filling an array, keeping a running total of the values placed in the \r
+ array. Then run through the array adding up all the values. If the two totals \r
+ do not match, stop the check variable from incrementing. */\r
+ for( ;; )\r
+ {\r
+ dTotal1 = 0.0;\r
+ dTotal2 = 0.0;\r
+\r
+ for( xPosition = 0; xPosition < xArraySize; xPosition++ )\r
+ {\r
+ pdArray[ xPosition ] = ( portDOUBLE ) xPosition + 5.5;\r
+ dTotal1 += ( portDOUBLE ) xPosition + 5.5; \r
+ }\r
+\r
+ #if configUSE_PREEMPTION == 0\r
+ taskYIELD();\r
+ #endif\r
+\r
+ for( xPosition = 0; xPosition < xArraySize; xPosition++ )\r
+ {\r
+ dTotal2 += pdArray[ xPosition ];\r
+ }\r
+\r
+ dDifference = dTotal1 - dTotal2;\r
+ if( fabs( dDifference ) > 0.001 )\r
+ {\r
+ sError = pdTRUE;\r
+ }\r
+\r
+ #if configUSE_PREEMPTION == 0\r
+ taskYIELD();\r
+ #endif\r
+\r
+ if( sError == pdFALSE )\r
+ {\r
+ /* If the calculation has always been correct, increment the check \r
+ variable so we know this task is still running okay. */\r
+ ( *pusTaskCheckVariable )++;\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static portTASK_FUNCTION( vCompetingMathTask4, pvParameters )\r
+{\r
+volatile portDOUBLE *pdArray, dTotal1, dTotal2, dDifference;\r
+volatile unsigned short *pusTaskCheckVariable;\r
+const size_t xArraySize = 10;\r
+size_t xPosition;\r
+short sError = pdFALSE;\r
+\r
+ /* Must be called before any hardware floating point operations are\r
+ performed to let the RTOS portable layer know that this task requires\r
+ a floating point context. */\r
+ #if __TI_VFP_SUPPORT__\r
+ vPortTaskUsesFPU();\r
+ #endif\r
+\r
+ /* The variable this task increments to show it is still running is passed in \r
+ as the parameter. */\r
+ pusTaskCheckVariable = ( unsigned short * ) pvParameters;\r
+\r
+ pdArray = ( portDOUBLE * ) pvPortMalloc( xArraySize * sizeof( portDOUBLE ) );\r
+\r
+ /* Keep filling an array, keeping a running total of the values placed in the \r
+ array. Then run through the array adding up all the values. If the two totals \r
+ do not match, stop the check variable from incrementing. */\r
+ for( ;; )\r
+ {\r
+ dTotal1 = 0.0;\r
+ dTotal2 = 0.0;\r
+\r
+ for( xPosition = 0; xPosition < xArraySize; xPosition++ )\r
+ {\r
+ pdArray[ xPosition ] = ( portDOUBLE ) xPosition * 12.123;\r
+ dTotal1 += ( portDOUBLE ) xPosition * 12.123; \r
+ }\r
+\r
+ #if configUSE_PREEMPTION == 0\r
+ taskYIELD();\r
+ #endif\r
+\r
+ for( xPosition = 0; xPosition < xArraySize; xPosition++ )\r
+ {\r
+ dTotal2 += pdArray[ xPosition ];\r
+ }\r
+\r
+ dDifference = dTotal1 - dTotal2;\r
+ if( fabs( dDifference ) > 0.001 )\r
+ {\r
+ sError = pdTRUE;\r
+ }\r
+\r
+ #if configUSE_PREEMPTION == 0\r
+ taskYIELD();\r
+ #endif\r
+\r
+ if( sError == pdFALSE )\r
+ {\r
+ /* If the calculation has always been correct, increment the check \r
+ variable so we know this task is still running okay. */\r
+ ( *pusTaskCheckVariable )++;\r
+ }\r
+ }\r
+} \r
+/*-----------------------------------------------------------*/\r
+\r
+/* This is called to check that all the created tasks are still running. */\r
+portBASE_TYPE xAreMathsTaskStillRunning( void )\r
+{\r
+/* Keep a history of the check variables so we know if they have been incremented \r
+since the last call. */\r
+static unsigned short usLastTaskCheck[ mathNUMBER_OF_TASKS ] = { ( unsigned short ) 0 };\r
+portBASE_TYPE xReturn = pdTRUE, xTask;\r
+\r
+ /* Check the maths tasks are still running by ensuring their check variables \r
+ are still incrementing. */\r
+ for( xTask = 0; xTask < mathNUMBER_OF_TASKS; xTask++ )\r
+ {\r
+ if( usTaskCheck[ xTask ] == usLastTaskCheck[ xTask ] )\r
+ {\r
+ /* The check has not incremented so an error exists. */\r
+ xReturn = pdFALSE;\r
+ }\r
+\r
+ usLastTaskCheck[ xTask ] = usTaskCheck[ xTask ];\r
+ }\r
+\r
+ return xReturn;\r
+}\r
+\r
+\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
+\r
+ FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT \r
+ http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+ \r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ \r
+ http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
+ and contact details. \r
+ \r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool.\r
+\r
+ Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
+ the code with commercial support, indemnification, and middleware, under \r
+ the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
+ provide a safety engineered and independently SIL3 certified version under \r
+ the SafeRTOS brand: http://www.SafeRTOS.com.\r
+*/\r
+\r
+#ifndef FLOP_TASKS_H\r
+#define FLOP_TASKS_H\r
+\r
+void vStartMathTasks( unsigned portBASE_TYPE uxPriority );\r
+portBASE_TYPE xAreMathsTaskStillRunning( void );\r
+\r
+#endif\r
+\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
+\r
+ FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT \r
+ http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+ \r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ \r
+ http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
+ and contact details. \r
+ \r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool.\r
+\r
+ Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
+ the code with commercial support, indemnification, and middleware, under \r
+ the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
+ provide a safety engineered and independently SIL3 certified version under \r
+ the SafeRTOS brand: http://www.SafeRTOS.com.\r
+*/\r
+\r
+/******************************************************************************\r
+ * This project provides two demo applications. A simple blinky style project,\r
+ * and a more comprehensive test and demo application. The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting (defined in this file) is used to\r
+ * select between the two. The simply blinky demo is implemented and described\r
+ * in main_blinky.c. The more comprehensive test and demo application is\r
+ * implemented and described in main_full.c.\r
+ *\r
+ * This file implements the code that is not demo specific, including the\r
+ * hardware setup and FreeRTOS hook functions.\r
+ *\r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+\r
+/* Standard demo includes - just needed for the LED (ParTest) initialisation\r
+function. */\r
+#include "partest.h"\r
+\r
+/* Library includes. */\r
+#include "het.h"\r
+\r
+/* Set mainCREATE_SIMPLE_BLINKY_DEMO_ONLY to one to run the simple blinky demo,\r
+or 0 to run the more comprehensive test and demo application. */\r
+#define mainCREATE_SIMPLE_BLINKY_DEMO_ONLY 0\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * Set up the hardware ready to run this demo.\r
+ */\r
+static void prvSetupHardware( void );\r
+\r
+/*\r
+ * main_blinky() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.\r
+ * main_full() is used when mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 0.\r
+ */\r
+extern void main_blinky( void );\r
+extern void main_full( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* See the documentation page for this demo on the FreeRTOS.org web site for\r
+full information - including hardware setup requirements. */\r
+int main( void )\r
+{\r
+ /* Prepare the hardware to run this demo. */\r
+ prvSetupHardware();\r
+\r
+ /* The mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting is described at the top\r
+ of this file. */\r
+ #if mainCREATE_SIMPLE_BLINKY_DEMO_ONLY == 1\r
+ {\r
+ main_blinky();\r
+ }\r
+ #else\r
+ {\r
+ main_full();\r
+ }\r
+ #endif\r
+\r
+ return 0;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvSetupHardware( void )\r
+{\r
+ /* Perform any configuration necessary to use the ParTest LED output\r
+ functions. */\r
+ vParTestInitialise();\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationMallocFailedHook( void )\r
+{\r
+ /* vApplicationMallocFailedHook() will only be called if\r
+ configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook\r
+ function that will get called if a call to pvPortMalloc() fails.\r
+ pvPortMalloc() is called internally by the kernel whenever a task, queue,\r
+ timer or semaphore is created. It is also called by various parts of the\r
+ demo application. If heap_1.c or heap_2.c are used, then the size of the\r
+ heap available to pvPortMalloc() is defined by configTOTAL_HEAP_SIZE in\r
+ FreeRTOSConfig.h, and the xPortGetFreeHeapSize() API function can be used\r
+ to query the size of free heap space that remains (although it does not\r
+ provide information on how the remaining heap might be fragmented). */\r
+ taskDISABLE_INTERRUPTS();\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationIdleHook( void )\r
+{\r
+ /* vApplicationIdleHook() will only be called if configUSE_IDLE_HOOK is set\r
+ to 1 in FreeRTOSConfig.h. It will be called on each iteration of the idle\r
+ task. It is essential that code added to this hook function never attempts\r
+ to block in any way (for example, call xQueueReceive() with a block time\r
+ specified, or call vTaskDelay()). If the application makes use of the\r
+ vTaskDelete() API function (as this demo application does) then it is also\r
+ important that vApplicationIdleHook() is permitted to return to its calling\r
+ function, because it is the responsibility of the idle task to clean up\r
+ memory allocated by the kernel to any task that has since been deleted. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationStackOverflowHook( xTaskHandle pxTask, signed char *pcTaskName )\r
+{\r
+ ( void ) pcTaskName;\r
+ ( void ) pxTask;\r
+\r
+ /* Run time stack overflow checking is performed if\r
+ configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook\r
+ function is called if a stack overflow is detected. */\r
+ taskDISABLE_INTERRUPTS();\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vApplicationTickHook( void )\r
+{\r
+ /* This function will be called by each tick interrupt if\r
+ configUSE_TICK_HOOK is set to 1 in FreeRTOSConfig.h. User code can be\r
+ added here, but the tick hook is called from an interrupt context, so\r
+ code must not attempt to block, and only the interrupt safe FreeRTOS API\r
+ functions can be used (those that end in FromISR()). */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
+\r
+ FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT \r
+ http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+ \r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ \r
+ http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
+ and contact details. \r
+ \r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool.\r
+\r
+ Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
+ the code with commercial support, indemnification, and middleware, under \r
+ the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
+ provide a safety engineered and independently SIL3 certified version under \r
+ the SafeRTOS brand: http://www.SafeRTOS.com.\r
+*/\r
+\r
+/******************************************************************************\r
+ * NOTE 1: This project provides two demo applications. A simple blinky style\r
+ * project, and a more comprehensive test and demo application. The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
+ * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
+ * in main.c. This file implements the simply blinky style version.\r
+ *\r
+ * NOTE 2: This file only contains the source code that is specific to the\r
+ * basic demo. Generic functions, such FreeRTOS hook functions, and functions\r
+ * required to configure the hardware, are defined in main.c.\r
+ ******************************************************************************\r
+ *\r
+ * main_blinky() creates one queue, and two tasks. It then starts the\r
+ * scheduler.\r
+ *\r
+ * The Queue Send Task:\r
+ * The queue send task is implemented by the prvQueueSendTask() function in\r
+ * this file. prvQueueSendTask() sits in a loop that causes it to repeatedly\r
+ * block for 200 milliseconds, before sending the value 100 to the queue that\r
+ * was created within main_blinky(). Once the value is sent, the task loops\r
+ * back around to block for another 200 milliseconds.\r
+ *\r
+ * The Queue Receive Task:\r
+ * The queue receive task is implemented by the prvQueueReceiveTask() function\r
+ * in this file. prvQueueReceiveTask() sits in a loop where it repeatedly\r
+ * blocks on attempts to read data from the queue that was created within\r
+ * main_blinky(). When data is received, the task checks the value of the\r
+ * data, and if the value equals the expected 100, toggles an LED. The 'block\r
+ * time' parameter passed to the queue receive function specifies that the\r
+ * task should be held in the Blocked state indefinitely to wait for data to\r
+ * be available on the queue. The queue receive task will only leave the\r
+ * Blocked state when the queue send task writes to the queue. As the queue\r
+ * send task writes to the queue every 200 milliseconds, the queue receive\r
+ * task leaves the Blocked state every 200 milliseconds, and therefore toggles\r
+ * the LED every 200 milliseconds.\r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "semphr.h"\r
+\r
+/* Common demo includes. */\r
+#include "partest.h"\r
+\r
+/* Priorities at which the tasks are created. */\r
+#define mainQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
+#define mainQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )\r
+\r
+/* The rate at which data is sent to the queue. The 200ms value is converted\r
+to ticks using the portTICK_RATE_MS constant. */\r
+#define mainQUEUE_SEND_FREQUENCY_MS ( 200 / portTICK_RATE_MS )\r
+\r
+/* The number of items the queue can hold. This is 1 as the receive task\r
+will remove items as they are added, meaning the send task should always find\r
+the queue empty. */\r
+#define mainQUEUE_LENGTH ( 1 )\r
+\r
+/* Values passed to the two tasks just to check the task parameter \r
+functionality. */\r
+#define mainQUEUE_SEND_PARAMETER ( 0x1111UL )\r
+#define mainQUEUE_RECEIVE_PARAMETER ( 0x22UL )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The tasks as described in the comments at the top of this file.\r
+ */\r
+static void prvQueueReceiveTask( void *pvParameters );\r
+static void prvQueueSendTask( void *pvParameters );\r
+\r
+/*\r
+ * Called by main() to create the simply blinky style application if\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY is set to 1.\r
+ */\r
+void main_blinky( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The queue used by both tasks. */\r
+static xQueueHandle xQueue = NULL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void main_blinky( void )\r
+{\r
+ /* Create the queue. */\r
+ xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( unsigned long ) );\r
+\r
+ if( xQueue != NULL )\r
+ {\r
+ /* Start the two tasks as described in the comments at the top of this\r
+ file. */\r
+ xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */\r
+ ( signed char * ) "Rx", /* The text name assigned to the task - for debug only as it is not used by the kernel. */\r
+ configMINIMAL_STACK_SIZE, /* The size of the stack to allocate to the task. */\r
+ ( void * ) mainQUEUE_RECEIVE_PARAMETER, /* The parameter passed to the task - just to check the functionality. */\r
+ mainQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task. */\r
+ NULL ); /* The task handle is not required, so NULL is passed. */\r
+\r
+ xTaskCreate( prvQueueSendTask, ( signed char * ) "TX", configMINIMAL_STACK_SIZE, ( void * ) mainQUEUE_SEND_PARAMETER, mainQUEUE_SEND_TASK_PRIORITY, NULL );\r
+\r
+ /* Start the tasks and timer running. */\r
+ vTaskStartScheduler();\r
+ }\r
+\r
+ /* If all is well, the scheduler will now be running, and the following\r
+ line will never be reached. If the following line does execute, then\r
+ there was insufficient FreeRTOS heap memory available for the idle and/or\r
+ timer tasks to be created. See the memory management section on the\r
+ FreeRTOS web site for more details. */\r
+ for( ;; );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvQueueSendTask( void *pvParameters )\r
+{\r
+portTickType xNextWakeTime;\r
+const unsigned long ulValueToSend = 100UL;\r
+\r
+ /* Check the task parameter is as expected. */\r
+ configASSERT( ( ( unsigned long ) pvParameters ) == mainQUEUE_SEND_PARAMETER );\r
+\r
+ /* Initialise xNextWakeTime - this only needs to be done once. */\r
+ xNextWakeTime = xTaskGetTickCount();\r
+\r
+ for( ;; )\r
+ {\r
+ /* Place this task in the blocked state until it is time to run again.\r
+ The block time is specified in ticks, the constant used converts ticks\r
+ to ms. While in the Blocked state this task will not consume any CPU\r
+ time. */\r
+ vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_FREQUENCY_MS );\r
+\r
+ /* Send to the queue - causing the queue receive task to unblock and\r
+ toggle the LED. 0 is used as the block time so the sending operation\r
+ will not block - it shouldn't need to block as the queue should always\r
+ be empty at this point in the code. */\r
+ xQueueSend( xQueue, &ulValueToSend, 0U );\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvQueueReceiveTask( void *pvParameters )\r
+{\r
+unsigned long ulReceivedValue;\r
+\r
+ /* Check the task parameter is as expected. */\r
+ configASSERT( ( ( unsigned long ) pvParameters ) == mainQUEUE_RECEIVE_PARAMETER );\r
+\r
+ for( ;; )\r
+ {\r
+ /* Wait until something arrives in the queue - this task will block\r
+ indefinitely provided INCLUDE_vTaskSuspend is set to 1 in\r
+ FreeRTOSConfig.h. */\r
+ xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );\r
+\r
+ /* To get here something must have been received from the queue, but\r
+ is it the expected value? If it is, toggle the LED. */\r
+ if( ulReceivedValue == 100UL )\r
+ {\r
+ vParTestToggleLED( 0 );\r
+ ulReceivedValue = 0U;\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
--- /dev/null
+/*\r
+ FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
+\r
+ FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT \r
+ http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+ \r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ \r
+ http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
+ and contact details. \r
+ \r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool.\r
+\r
+ Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
+ the code with commercial support, indemnification, and middleware, under \r
+ the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
+ provide a safety engineered and independently SIL3 certified version under \r
+ the SafeRTOS brand: http://www.SafeRTOS.com.\r
+*/\r
+\r
+/******************************************************************************\r
+ * NOTE 1: This project provides two demo applications. A simple blinky style\r
+ * project, and a more comprehensive test and demo application. The\r
+ * mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting in main.c is used to select\r
+ * between the two. See the notes on using mainCREATE_SIMPLE_BLINKY_DEMO_ONLY\r
+ * in main.c. This file implements the comprehensive test and demo version.\r
+ *\r
+ * NOTE 2: This file only contains the source code that is specific to the\r
+ * full demo. Generic functions, such FreeRTOS hook functions, and functions\r
+ * required to configure the hardware, are defined in main.c.\r
+ ******************************************************************************\r
+ *\r
+ * main_full() creates all the demo application tasks and software timers,\r
+ * then starts the scheduler. The web documentation provides more details of\r
+ * the standard demo application tasks, which provide no particular\r
+ * functionality, but do provide a good example of how to use the FreeRTOS API.\r
+ *\r
+ * In addition to the standard demo tasks, the following tasks and tests are\r
+ * defined and/or created within this file:\r
+ *\r
+ * "Check" timer - The check software timer period is set to three seconds.\r
+ * The callback function associated with the check software timer checks that\r
+ * all the standard demo tasks are not only still executing, but are executing\r
+ * without reporting any errors. If the check software timer discovers that a\r
+ * task has either stalled, or reported an error, then the error is logged and\r
+ * the check software timer toggles the red LEDs. If an error has never been\r
+ * latched, the check software timer toggles the green LEDs. Therefore, if the\r
+ * system is executing correctly, the green LEDs will toggle every three\r
+ * seconds, and if an error has ever been detected, the red LEDs will toggle\r
+ * every three seconds.\r
+ *\r
+ * "Reg test" tasks - These fill both the core and floating point registers\r
+ * with known values, then check that each register maintains its expected\r
+ * value for the lifetime of the tasks. Each task uses a different set of\r
+ * values. The reg test tasks execute with a very low priority, so get\r
+ * preempted very frequently. A register containing an unexpected value is\r
+ * indicative of an error in the context switching mechanism.\r
+ *\r
+ * "LED" software timer - The callback function associated with the LED\r
+ * software time maintains a pattern of spinning white LEDs.\r
+ *\r
+ * See the documentation page for this demo on the FreeRTOS.org web site for\r
+ * full information, including hardware setup requirements. \r
+ */\r
+\r
+/* Standard includes. */\r
+#include <stdio.h>\r
+\r
+/* Kernel includes. */\r
+#include "FreeRTOS.h"\r
+#include "task.h"\r
+#include "timers.h"\r
+#include "semphr.h"\r
+\r
+/* Standard demo application includes. */\r
+#include "integer.h"\r
+#include "PollQ.h"\r
+#include "semtest.h"\r
+#include "dynamic.h"\r
+#include "BlockQ.h"\r
+#include "blocktim.h"\r
+#include "countsem.h"\r
+#include "GenQTest.h"\r
+#include "recmutex.h"\r
+#include "death.h"\r
+#include "partest.h"\r
+#include "flop.h"\r
+#include "serial.h"\r
+#include "comtest.h"\r
+\r
+/* Priorities for the demo application tasks. */\r
+#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2UL )\r
+#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1UL )\r
+#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2UL )\r
+#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3UL )\r
+#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
+#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )\r
+#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )\r
+\r
+/* A block time of zero simply means "don't block". */\r
+#define mainDONT_BLOCK ( 0UL )\r
+\r
+/* The period after which the check timer will expire, converted to ticks. */\r
+#define mainCHECK_TIMER_PERIOD_MS ( 3000UL / portTICK_RATE_MS )\r
+\r
+/* The period after which the LED timer will expire, converted to ticks. */\r
+#define mainLED_TIMER_PERIOD_MS ( 75UL / portTICK_RATE_MS )\r
+\r
+/* Constants for the ComTest tasks. */\r
+#define mainCOM_TEST_BAUD_RATE ( ( unsigned long ) 19200 )\r
+#define mainCOM_TEST_LED ( 100 )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * The check timer callback function, as described at the top of this file.\r
+ */\r
+static void prvCheckTimerCallback( xTimerHandle xTimer );\r
+\r
+/*\r
+ * The LED timer callback function, as described at the top of this file.\r
+ */\r
+static void prvLEDTimerCallback( xTimerHandle xTimer );\r
+\r
+/*\r
+ * The reg test tasks, as described at the top of this file.\r
+ */\r
+extern void vRegTestTask1( void *pvParameters );\r
+extern void vRegTestTask2( void *pvParameters );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Variables that are incremented on each iteration of the reg test tasks -\r
+provided the tasks have not reported any errors. The check task inspects these\r
+variables to ensure they are still incrementing as expected. If a variable\r
+stops incrementing then it is likely that its associate task has stalled. */\r
+volatile unsigned long ulRegTest1Counter = 0, ulRegTest2Counter = 0;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+void main_full( void )\r
+{\r
+xTimerHandle xTimer = NULL;\r
+\r
+ /* Start all the standard demo/test tasks. These have not particular\r
+ functionality, but do demonstrate how to use the FreeRTOS API, and test the\r
+ kernel port. */\r
+ vStartIntegerMathTasks( tskIDLE_PRIORITY );\r
+ vStartDynamicPriorityTasks();\r
+ vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );\r
+ vCreateBlockTimeTasks();\r
+ vStartCountingSemaphoreTasks();\r
+ vStartGenericQueueTasks( tskIDLE_PRIORITY );\r
+ vStartRecursiveMutexTasks();\r
+ vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );\r
+ vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );\r
+ vStartMathTasks( mainFLOP_TASK_PRIORITY );\r
+ vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );\r
+\r
+ /* Create the register test tasks, as described at the top of this file. */\r
+ xTaskCreate( vRegTestTask1, ( const signed char * ) "Reg1...", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+ xTaskCreate( vRegTestTask2, ( const signed char * ) "Reg2...", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );\r
+ \r
+\r
+ /* Create the software timer that performs the 'check' functionality,\r
+ as described at the top of this file. */\r
+ xTimer = xTimerCreate( ( const signed char * ) "CheckTimer",/* A text name, purely to help debugging. */\r
+ ( mainCHECK_TIMER_PERIOD_MS ), /* The timer period, in this case 3000ms (3s). */\r
+ pdTRUE, /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */\r
+ ( void * ) 0, /* The ID is not used, so can be set to anything. */\r
+ prvCheckTimerCallback /* The callback function that inspects the status of all the other tasks. */\r
+ );\r
+ \r
+ if( xTimer != NULL )\r
+ {\r
+ xTimerStart( xTimer, mainDONT_BLOCK );\r
+ }\r
+\r
+ /* Create the software timer that performs the 'LED spin' functionality,\r
+ as described at the top of this file. */\r
+ xTimer = xTimerCreate( ( const signed char * ) "LEDTimer", /* A text name, purely to help debugging. */\r
+ ( mainLED_TIMER_PERIOD_MS ), /* The timer period, in this case 75ms. */\r
+ pdTRUE, /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */\r
+ ( void * ) 0, /* The ID is not used, so can be set to anything. */\r
+ prvLEDTimerCallback /* The callback function that toggles the white LEDs. */\r
+ );\r
+\r
+ if( xTimer != NULL )\r
+ {\r
+ xTimerStart( xTimer, mainDONT_BLOCK );\r
+ }\r
+\r
+ /* The set of tasks created by the following function call have to be \r
+ created last as they keep account of the number of tasks they expect to see \r
+ running. */\r
+ vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );\r
+\r
+ /* Start the scheduler. */\r
+ vTaskStartScheduler();\r
+ \r
+ /* If all is well, the scheduler will now be running, and the following line\r
+ will never be reached. If the following line does execute, then there was\r
+ insufficient FreeRTOS heap memory available for the idle and/or timer tasks\r
+ to be created. See the memory management section on the FreeRTOS web site\r
+ for more details. */\r
+ for( ;; ); \r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvCheckTimerCallback( xTimerHandle xTimer )\r
+{\r
+static long lChangeToRedLEDsAlready = pdFALSE;\r
+static unsigned long ulLastRegTest1Counter = 0, ulLastRegTest2Counter = 0;\r
+unsigned long ulErrorFound = pdFALSE;\r
+/* LEDs are defaulted to use the Green LEDs. The Red LEDs are used if an error\r
+is found. */\r
+static unsigned long ulLED1 = 8, ulLED2 = 11;\r
+const unsigned long ulRedLED1 = 6, ulRedLED2 = 9;\r
+\r
+ /* Check all the demo tasks (other than the flash tasks) to ensure\r
+ they are all still running, and that none have detected an error. */\r
+\r
+ if( xAreIntegerMathsTaskStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreBlockingQueuesStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if ( xAreBlockTimeTestTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if ( xAreGenericQueueTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if ( xAreRecursiveMutexTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xIsCreateTaskStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xArePollingQueuesStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreSemaphoreTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreMathsTaskStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( xAreComTestTasksStillRunning() != pdTRUE )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ /* Check the reg test tasks are still cycling. They will stop\r
+ incrementing their loop counters if they encounter an error. */\r
+ if( ulRegTest1Counter == ulLastRegTest1Counter )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ if( ulRegTest2Counter == ulLastRegTest2Counter )\r
+ {\r
+ ulErrorFound = pdTRUE;\r
+ }\r
+\r
+ ulLastRegTest1Counter = ulRegTest1Counter;\r
+ ulLastRegTest2Counter = ulRegTest2Counter;\r
+\r
+ /* Toggle the check LEDs to give an indication of the system status. If\r
+ the green LEDs are toggling, then no errors have been detected. If the red\r
+ LEDs are toggling, then an error has been reported in at least one task. */\r
+ vParTestToggleLED( ulLED1 );\r
+ vParTestToggleLED( ulLED2 );\r
+ \r
+ /* Have any errors been latch in ulErrorFound? If so, ensure the gree LEDs\r
+ are off, then switch to using the red LEDs. */\r
+ if( ulErrorFound != pdFALSE )\r
+ {\r
+ if( lChangeToRedLEDsAlready == pdFALSE )\r
+ {\r
+ lChangeToRedLEDsAlready = pdTRUE;\r
+ \r
+ /* An error has been found. Switch to use the red LEDs. */\r
+ vParTestSetLED( ulLED1, pdFALSE );\r
+ vParTestSetLED( ulLED2, pdFALSE );\r
+ ulLED1 = ulRedLED1;\r
+ ulLED2 = ulRedLED2;\r
+ }\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+static void prvLEDTimerCallback( xTimerHandle xTimer )\r
+{\r
+const unsigned long ulNumWhiteLEDs = 6;\r
+static unsigned long ulLit1 = 2, ulLit2 = 1;\r
+\r
+ vParTestSetLED( ulLit2, pdFALSE );\r
+\r
+ ulLit2 = ulLit1;\r
+ ulLit1++;\r
+\r
+ if( ulLit1 >= ulNumWhiteLEDs )\r
+ {\r
+ ulLit1 = 0;\r
+ }\r
+\r
+ vParTestSetLED( ulLit1, pdTRUE );\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
--- /dev/null
+;/*\r
+; FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
+;\r
+;\r
+; ***************************************************************************\r
+; * *\r
+; * FreeRTOS tutorial books are available in pdf and paperback. *\r
+; * Complete, revised, and edited pdf reference manuals are also *\r
+; * available. *\r
+; * *\r
+; * Purchasing FreeRTOS documentation will not only help you, by *\r
+; * ensuring you get running as quickly as possible and with an *\r
+; * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+; * the FreeRTOS project to continue with its mission of providing *\r
+; * professional grade, cross platform, de facto standard solutions *\r
+; * for microcontrollers - completely free of charge! *\r
+; * *\r
+; * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+; * *\r
+; * Thank you for using FreeRTOS, and thank you for your support! *\r
+; * *\r
+; ***************************************************************************\r
+;\r
+;\r
+; This file is part of the FreeRTOS distribution.\r
+;\r
+; FreeRTOS is free software; you can redistribute it and/or modify it under\r
+; the terms of the GNU General Public License (version 2) as published by the\r
+; Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+; >>>NOTE<<< The modification to the GPL is included to allow you to\r
+; distribute a combined work that includes FreeRTOS without being obliged to\r
+; provide the source code for proprietary components outside of the FreeRTOS\r
+; kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+; more details. You should have received a copy of the GNU General Public\r
+; License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+; can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+; by writing to Richard Barry, contact details for whom are available on the\r
+; FreeRTOS WEB site.\r
+;\r
+; 1 tab == 4 spaces!\r
+; \r
+; ***************************************************************************\r
+; * *\r
+; * Having a problem? Start by reading the FAQ "My application does *\r
+; * not run, what could be wrong? *\r
+; * *\r
+; * http://www.FreeRTOS.org/FAQHelp.html *\r
+; * *\r
+; ***************************************************************************\r
+;\r
+; \r
+; http://www.FreeRTOS.org - Documentation, training, latest information, \r
+; license and contact details.\r
+; \r
+; http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+; including FreeRTOS+Trace - an indispensable productivity tool.\r
+;\r
+; Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
+; the code with commercial support, indemnification, and middleware, under \r
+; the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
+; provide a safety engineered and independently SIL3 certified version under \r
+; the SafeRTOS brand: http://www.SafeRTOS.com.\r
+;*/\r
+\r
+;-------------------------------------------------\r
+;\r
+ .def vRegTestTask1\r
+ .ref ulRegTest1Counter\r
+\r
+ .if (__TI_VFP_SUPPORT__)\r
+ .ref vPortTaskUsesFPU\r
+ .endif ;__TI_VFP_SUPPORT__\r
+\r
+ .text\r
+ .arm\r
+\r
+vRegTestTask1:\r
+ .if (__TI_VFP_SUPPORT__)\r
+ ; Let the port layer know that this task needs its FPU context saving.\r
+ BL vPortTaskUsesFPU\r
+ .endif\r
+\r
+ ; Fill each general purpose register with a known value.\r
+ mov r0, #0xFF\r
+ mov r1, #0x11\r
+ mov r2, #0x22\r
+ mov r3, #0x33\r
+ mov r4, #0x44 \r
+ mov r5, #0x55\r
+ mov r6, #0x66\r
+ mov r7, #0x77\r
+ mov r8, #0x88\r
+ mov r9, #0x99\r
+ mov r10, #0xAA\r
+ mov r11, #0xBB\r
+ mov r12, #0xCC\r
+ mov r14, #0xEE\r
+\r
+ .if (__TI_VFP_SUPPORT__)\r
+ ; Fill each FPU register with a known value.\r
+ vmov d0, r0, r1\r
+ vmov d1, r2, r3\r
+ vmov d2, r4, r5\r
+ vmov d3, r6, r7\r
+ vmov d4, r8, r9\r
+ vmov d5, r10, r11\r
+ vmov d6, r0, r1\r
+ vmov d7, r2, r3\r
+ vmov d8, r4, r5\r
+ vmov d9, r6, r7\r
+ vmov d10, r8, r9\r
+ vmov d11, r10, r11\r
+ vmov d12, r0, r1\r
+ vmov d13, r2, r3\r
+ vmov d14, r4, r5\r
+ vmov d15, r6, r7\r
+ .endif\r
+\r
+ \r
+vRegTestLoop1:\r
+\r
+ ; Force yeild\r
+ swi #0\r
+\r
+ .if (__TI_VFP_SUPPORT__)\r
+ ; Check all the VFP registers still contain the values set above.\r
+ ; First save registers that are clobbered by the test.\r
+ push { r0-r1 }\r
+\r
+ vmov r0, r1, d0\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x11\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d1\r
+ cmp r0, #0x22\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x33\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d2\r
+ cmp r0, #0x44\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x55\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d3\r
+ cmp r0, #0x66\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x77\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d4\r
+ cmp r0, #0x88\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x99\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d5\r
+ cmp r0, #0xAA\r
+ bne reg1_error_loopf\r
+ cmp r1, #0xBB\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d6\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x11\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d7\r
+ cmp r0, #0x22\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x33\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d8\r
+ cmp r0, #0x44\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x55\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d9\r
+ cmp r0, #0x66\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x77\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d10\r
+ cmp r0, #0x88\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x99\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d11\r
+ cmp r0, #0xAA\r
+ bne reg1_error_loopf\r
+ cmp r1, #0xBB\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d12\r
+ cmp r0, #0xFF\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x11\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d13\r
+ cmp r0, #0x22\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x33\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d14\r
+ cmp r0, #0x44\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x55\r
+ bne reg1_error_loopf\r
+ vmov r0, r1, d15\r
+ cmp r0, #0x66\r
+ bne reg1_error_loopf\r
+ cmp r1, #0x77\r
+ bne reg1_error_loopf\r
+\r
+ ; Restore the registers that were clobbered by the test.\r
+ pop {r0-r1}\r
+\r
+ ; VFP register test passed. Jump to the core register test.\r
+ b reg1_loopf_pass\r
+\r
+reg1_error_loopf:\r
+ ; If this line is hit then a VFP register value was found to be\r
+ ; incorrect.\r
+ b reg1_error_loopf\r
+\r
+reg1_loopf_pass:\r
+\r
+ .endif ;__TI_VFP_SUPPORT__\r
+\r
+ ; Test each general purpose register to check that it still contains the\r
+ ; expected known value, jumping to vRegTestError1 if any register contains\r
+ ; an unexpected value.\r
+ cmp r0, #0xFF\r
+ bne vRegTestError1 \r
+ cmp r1, #0x11\r
+ bne vRegTestError1 \r
+ cmp r2, #0x22\r
+ bne vRegTestError1 \r
+ cmp r3, #0x33\r
+ bne vRegTestError1 \r
+ cmp r4, #0x44\r
+ bne vRegTestError1 \r
+ cmp r5, #0x55\r
+ bne vRegTestError1 \r
+ cmp r6, #0x66\r
+ bne vRegTestError1 \r
+ cmp r7, #0x77\r
+ bne vRegTestError1 \r
+ cmp r8, #0x88\r
+ bne vRegTestError1 \r
+ cmp r9, #0x99\r
+ bne vRegTestError1 \r
+ cmp r10, #0xAA\r
+ bne vRegTestError1 \r
+ cmp r11, #0xBB\r
+ bne vRegTestError1 \r
+ cmp r12, #0xCC\r
+ bne vRegTestError1 \r
+ cmp r14, #0xEE\r
+ bne vRegTestError1 \r
+ \r
+ ; This task is still running without jumping to vRegTestError1, so increment\r
+ ; the loop counter so the check task knows the task is running error free.\r
+ stmfd sp!, { r0-r1 }\r
+ ldr r0, Count1Const\r
+ ldr r1, [r0]\r
+ add r1, r1, #1\r
+ str r1, [r0]\r
+ ldmfd sp!, { r0-r1 }\r
+ \r
+ ; Loop again, performing the same tests.\r
+ b vRegTestLoop1\r
+\r
+Count1Const .word ulRegTest1Counter\r
+ \r
+vRegTestError1:\r
+ b vRegTestError1\r
+\r
+\r
+;-------------------------------------------------\r
+;\r
+ .def vRegTestTask2\r
+ .ref ulRegTest2Counter\r
+ .text\r
+ .arm\r
+;\r
+vRegTestTask2:\r
+ .if (__TI_VFP_SUPPORT__)\r
+ ; Let the port layer know that this task needs its FPU context saving.\r
+ BL vPortTaskUsesFPU\r
+ .endif\r
+\r
+ ; Fill each general purpose register with a known value.\r
+ mov r0, #0xFF000000\r
+ mov r1, #0x11000000\r
+ mov r2, #0x22000000\r
+ mov r3, #0x33000000\r
+ mov r4, #0x44000000 \r
+ mov r5, #0x55000000\r
+ mov r6, #0x66000000\r
+ mov r7, #0x77000000\r
+ mov r8, #0x88000000\r
+ mov r9, #0x99000000\r
+ mov r10, #0xAA000000\r
+ mov r11, #0xBB000000\r
+ mov r12, #0xCC000000\r
+ mov r14, #0xEE000000\r
+ \r
+ .if (__TI_VFP_SUPPORT__)\r
+\r
+ ; Fill each FPU register with a known value.\r
+ vmov d0, r0, r1\r
+ vmov d1, r2, r3\r
+ vmov d2, r4, r5\r
+ vmov d3, r6, r7\r
+ vmov d4, r8, r9\r
+ vmov d5, r10, r11\r
+ vmov d6, r0, r1\r
+ vmov d7, r2, r3\r
+ vmov d8, r4, r5\r
+ vmov d9, r6, r7\r
+ vmov d10, r8, r9\r
+ vmov d11, r10, r11\r
+ vmov d12, r0, r1\r
+ vmov d13, r2, r3\r
+ vmov d14, r4, r5\r
+ vmov d15, r6, r7\r
+ .endif\r
+\r
+vRegTestLoop2:\r
+\r
+ .if (__TI_VFP_SUPPORT__)\r
+ ; Check all the VFP registers still contain the values set above.\r
+ ; First save registers that are clobbered by the test.\r
+ push { r0-r1 }\r
+\r
+ vmov r0, r1, d0\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d1\r
+ cmp r0, #0x22000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x33000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d2\r
+ cmp r0, #0x44000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x55000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d3\r
+ cmp r0, #0x66000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x77000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d4\r
+ cmp r0, #0x88000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x99000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d5\r
+ cmp r0, #0xAA000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0xBB000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d6\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d7\r
+ cmp r0, #0x22000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x33000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d8\r
+ cmp r0, #0x44000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x55000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d9\r
+ cmp r0, #0x66000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x77000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d10\r
+ cmp r0, #0x88000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x99000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d11\r
+ cmp r0, #0xAA000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0xBB000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d12\r
+ cmp r0, #0xFF000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x11000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d13\r
+ cmp r0, #0x22000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x33000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d14\r
+ cmp r0, #0x44000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x55000000\r
+ bne reg2_error_loopf\r
+ vmov r0, r1, d15\r
+ cmp r0, #0x66000000\r
+ bne reg2_error_loopf\r
+ cmp r1, #0x77000000\r
+ bne reg2_error_loopf\r
+\r
+ ; Restore the registers that were clobbered by the test.\r
+ pop {r0-r1}\r
+\r
+ ; VFP register test passed. Jump to the core register test.\r
+ b reg2_loopf_pass\r
+\r
+reg2_error_loopf:\r
+ ; If this line is hit then a VFP register value was found to be\r
+ ; incorrect.\r
+ b reg2_error_loopf\r
+\r
+reg2_loopf_pass:\r
+\r
+ .endif ;__TI_VFP_SUPPORT__\r
+\r
+ ; Test each general purpose register to check that it still contains the\r
+ ; expected known value, jumping to vRegTestError2 if any register contains\r
+ ; an unexpected value.\r
+ cmp r0, #0xFF000000\r
+ bne vRegTestError2 \r
+ cmp r1, #0x11000000\r
+ bne vRegTestError2 \r
+ cmp r2, #0x22000000\r
+ bne vRegTestError2 \r
+ cmp r3, #0x33000000\r
+ bne vRegTestError2 \r
+ cmp r4, #0x44000000\r
+ bne vRegTestError2 \r
+ cmp r5, #0x55000000\r
+ bne vRegTestError2 \r
+ cmp r6, #0x66000000\r
+ bne vRegTestError2 \r
+ cmp r7, #0x77000000\r
+ bne vRegTestError2 \r
+ cmp r8, #0x88000000\r
+ bne vRegTestError2 \r
+ cmp r9, #0x99000000\r
+ bne vRegTestError2 \r
+ cmp r10, #0xAA000000\r
+ bne vRegTestError2 \r
+ cmp r11, #0xBB000000\r
+ bne vRegTestError2 \r
+ cmp r12, #0xCC000000\r
+ bne vRegTestError2 \r
+ cmp r14, #0xEE000000\r
+ bne vRegTestError2 \r
+ \r
+ ; This task is still running without jumping to vRegTestError2, so increment\r
+ ; the loop counter so the check task knows the task is running error free.\r
+ stmfd sp!, { r0-r1 }\r
+ ldr r0, Count2Const\r
+ ldr r1, [r0]\r
+ add r1, r1, #1\r
+ str r1, [r0]\r
+ ldmfd sp!, { r0-r1 }\r
+ \r
+ ; Loop again, performing the same tests.\r
+ b vRegTestLoop2\r
+\r
+Count2Const .word ulRegTest2Counter\r
+ \r
+vRegTestError2:\r
+ b vRegTestError2\r
+\r
+;-------------------------------------------------\r
+ \r
+ \r
+ \r
--- /dev/null
+/*\r
+ FreeRTOS V7.3.0 - Copyright (C) 2012 Real Time Engineers Ltd.\r
+\r
+ FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT \r
+ http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.\r
+\r
+ ***************************************************************************\r
+ * *\r
+ * FreeRTOS tutorial books are available in pdf and paperback. *\r
+ * Complete, revised, and edited pdf reference manuals are also *\r
+ * available. *\r
+ * *\r
+ * Purchasing FreeRTOS documentation will not only help you, by *\r
+ * ensuring you get running as quickly as possible and with an *\r
+ * in-depth knowledge of how to use FreeRTOS, it will also help *\r
+ * the FreeRTOS project to continue with its mission of providing *\r
+ * professional grade, cross platform, de facto standard solutions *\r
+ * for microcontrollers - completely free of charge! *\r
+ * *\r
+ * >>> See http://www.FreeRTOS.org/Documentation for details. <<< *\r
+ * *\r
+ * Thank you for using FreeRTOS, and thank you for your support! *\r
+ * *\r
+ ***************************************************************************\r
+\r
+\r
+ This file is part of the FreeRTOS distribution.\r
+\r
+ FreeRTOS is free software; you can redistribute it and/or modify it under\r
+ the terms of the GNU General Public License (version 2) as published by the\r
+ Free Software Foundation AND MODIFIED BY the FreeRTOS exception.\r
+ >>>NOTE<<< The modification to the GPL is included to allow you to\r
+ distribute a combined work that includes FreeRTOS without being obliged to\r
+ provide the source code for proprietary components outside of the FreeRTOS\r
+ kernel. FreeRTOS is distributed in the hope that it will be useful, but\r
+ WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY\r
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for\r
+ more details. You should have received a copy of the GNU General Public\r
+ License and the FreeRTOS license exception along with FreeRTOS; if not it\r
+ can be viewed here: http://www.freertos.org/a00114.html and also obtained\r
+ by writing to Richard Barry, contact details for whom are available on the\r
+ FreeRTOS WEB site.\r
+\r
+ 1 tab == 4 spaces!\r
+ \r
+ ***************************************************************************\r
+ * *\r
+ * Having a problem? Start by reading the FAQ "My application does *\r
+ * not run, what could be wrong?" *\r
+ * *\r
+ * http://www.FreeRTOS.org/FAQHelp.html *\r
+ * *\r
+ ***************************************************************************\r
+\r
+ \r
+ http://www.FreeRTOS.org - Documentation, training, latest versions, license \r
+ and contact details. \r
+ \r
+ http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,\r
+ including FreeRTOS+Trace - an indispensable productivity tool.\r
+\r
+ Real Time Engineers ltd license FreeRTOS to High Integrity Systems, who sell \r
+ the code with commercial support, indemnification, and middleware, under \r
+ the OpenRTOS brand: http://www.OpenRTOS.com. High Integrity Systems also\r
+ provide a safety engineered and independently SIL3 certified version under \r
+ the SafeRTOS brand: http://www.SafeRTOS.com.\r
+*/\r
+\r
+/*\r
+ BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR UART0.\r
+ \r
+ ***NOTE*** \r
+ The implementation provided in this file is intended to demonstrate using\r
+ queues to pass data into and out of interrupts, and to demonstrate context \r
+ switching from inside an interrupt service routine. It is *not* intended to \r
+ represent an efficient implementation. Real implementations should not pass \r
+ individual characters on queues, but instead use RAM buffers, DMA and/or \r
+ FIFO features as appropriate. Semaphores can be used to signal a task that \r
+ data is available to be processed.\r
+*/\r
+\r
+/* Scheduler includes. */\r
+#include "FreeRTOS.h"\r
+#include "queue.h"\r
+#include "semphr.h"\r
+\r
+/* Demo application includes. */\r
+#include "serial.h"\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Registers required to configure the SCI. */\r
+#define serialSCI_GCR0_REG ( * ( ( volatile unsigned long * ) 0xFFF7E400 ) )\r
+#define serialSCI_GCR1_REG ( * ( ( volatile unsigned long * ) 0xFFF7E404 ) )\r
+#define serialSCI_GCR2_REG ( * ( ( volatile unsigned long * ) 0xFFF7E408 ) )\r
+#define serialSCI_SETINT_REG ( * ( ( volatile unsigned long * ) 0xFFF7E40C ) )\r
+#define serialSCI_CLRINT_REG ( * ( ( volatile unsigned long * ) 0xFFF7E410 ) )\r
+#define serialSCI_SETINTLVL_REG ( * ( ( volatile unsigned long * ) 0xFFF7E414 ) )\r
+#define serialSCI_CLRINTLVL_REG ( * ( ( volatile unsigned long * ) 0xFFF7E418 ) )\r
+#define serialSCI_FLR_REG ( * ( ( volatile unsigned long * ) 0xFFF7E41C ) )\r
+#define serialSCI_INTVEC0_REG ( * ( ( volatile unsigned long * ) 0xFFF7E420 ) )\r
+#define serialSCI_INTVEC1_REG ( * ( ( volatile unsigned long * ) 0xFFF7E424 ) )\r
+#define serialSCI_LENGTH_REG ( * ( ( volatile unsigned long * ) 0xFFF7E428 ) )\r
+#define serialSCI_BAUD_REG ( * ( ( volatile unsigned long * ) 0xFFF7E42C ) )\r
+#define serialSCI_RD_REG ( * ( ( volatile unsigned long * ) 0xFFF7E434 ) )\r
+#define serialSCI_TD_REG ( * ( ( volatile unsigned long * ) 0xFFF7E438 ) )\r
+#define serialSCI_FUN_REG ( * ( ( volatile unsigned long * ) 0xFFF7E43C ) )\r
+#define serialSCI_DIR_REG ( * ( ( volatile unsigned long * ) 0xFFF7E440 ) )\r
+#define serialSCI_DIN_REG ( * ( ( volatile unsigned long * ) 0xFFF7E444 ) )\r
+#define serialSCI_DOUT_REG ( * ( ( volatile unsigned long * ) 0xFFF7E448 ) )\r
+#define serialSCI_DSET_REG ( * ( ( volatile unsigned long * ) 0xFFF7E44C ) )\r
+#define serialSCI_DCLR_REG ( * ( ( volatile unsigned long * ) 0xFFF7E450 ) )\r
+\r
+/* SCI constants */\r
+#define serialSCI_FE_INT ( 0x04000000 ) /* framming error */\r
+#define serialSCI_OE_INT ( 0x02000000 ) /* overrun error */\r
+#define serialSCI_PE_INT ( 0x01000000 ) /* parity error */\r
+#define serialSCI_RX_INT ( 0x00000200 ) /* receive buffer ready */\r
+#define serialSCI_TX_INT ( 0x00000100 ) /* transmit buffer ready */\r
+#define serialSCI_WAKE_INT ( 0x00000002 ) /* wakeup */\r
+#define serialSCI_BREAK_INT ( 0x00000001 ) /* break detect */\r
+#define serialSCI_IDLE_FLG ( 0x00000004 ) /* IDLE flasg */\r
+\r
+/* Registers required to configure the VIM. */\r
+#define serialVIM_REQMASKSET0_REG ( * ( ( volatile unsigned long * ) 0xFFFFFE30 ) )\r
+#define serialVIM_SCIHINT_RAM ( * ( ( void (**)(void) ) 0xFFF82038 ) )\r
+\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* Misc defines. */\r
+#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )\r
+#define serNO_BLOCK ( ( portTickType ) 0 )\r
+#define serTX_BLOCK_TIME ( 40 / portTICK_RATE_MS )\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* The queue used to hold received characters. */\r
+static xQueueHandle xRxedChars = NULL;\r
+static xQueueHandle xCharsForTx = NULL;\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/* UART interrupt handler. */\r
+__interrupt void vSCIInterruptHandler( void );\r
+\r
+/*-----------------------------------------------------------*/\r
+\r
+/*\r
+ * See the serial2.h header file.\r
+ */\r
+xComPortHandle xSerialPortInitMinimal( unsigned long ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )\r
+{\r
+xComPortHandle xReturn = ( xComPortHandle ) 0;\r
+\r
+ /* unused parameters, demo has a fixed baud rate (19200) */\r
+ ( void ) ulWantedBaud;\r
+\r
+ /* Create the queues used to hold Rx/Tx characters. */\r
+ xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed char ) );\r
+ xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed char ) );\r
+ \r
+ /* If the queue/semaphore was created correctly then setup the serial port\r
+ hardware. */\r
+ if( ( xRxedChars != serINVALID_QUEUE ) && ( xCharsForTx != serINVALID_QUEUE ) )\r
+ {\r
+ /* Initalise SCI1 */\r
+ /* Bring SCI out of reset */\r
+ serialSCI_GCR0_REG = 0x00000001UL;\r
+ /* Disable all interrupts */\r
+ serialSCI_CLRINT_REG = 0xFFFFFFFFUL;\r
+ /* All Interrupt to SCI High Level */\r
+ serialSCI_CLRINTLVL_REG = 0xFFFFFFFFUL;\r
+ /* Global control 1 */\r
+ serialSCI_GCR1_REG = 0x03010032UL;\r
+ /* Baudrate */\r
+ serialSCI_BAUD_REG = 292;\r
+ /* Transmission length (8-bit) */\r
+ serialSCI_LENGTH_REG = 8 - 1;\r
+ /* Set SCI pins functional mode */\r
+ serialSCI_FUN_REG = 0x00000006UL;\r
+ /* Enable RX interrupt */\r
+ serialSCI_SETINT_REG = 0x00000200UL;\r
+ /* Finally start SCI1 */\r
+ serialSCI_GCR1_REG |= 0x00000080UL;\r
+\r
+ /* Setup interrupt routine address in VIM table */\r
+ serialVIM_SCIHINT_RAM = &vSCIInterruptHandler;\r
+ /* Enable SCI interrupt in VIM */\r
+ serialVIM_REQMASKSET0_REG = 0x00002000UL;\r
+ }\r
+\r
+ /* This demo file only supports a single port but we have to return\r
+ something to comply with the standard demo header file. */\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed char *pcRxedChar, portTickType xBlockTime )\r
+{\r
+ /* The port handle is not required as this driver only supports one port. */\r
+ ( void ) pxPort;\r
+\r
+ /* Get the next character from the buffer. Return false if no characters\r
+ are available, or arrive before xBlockTime expires. */\r
+ if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )\r
+ {\r
+ return pdTRUE;\r
+ }\r
+ else\r
+ {\r
+ return pdFALSE;\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSerialPutString( xComPortHandle pxPort, const signed char * const pcString, unsigned portSHORT usStringLength )\r
+{\r
+signed char *pxNext;\r
+\r
+ /* A couple of parameters that this port does not use. */\r
+ ( void ) usStringLength;\r
+\r
+ /* NOTE: This implementation does not handle the queue being full as no\r
+ block time is used! */\r
+\r
+ /* Send each character in the string, one at a time. */\r
+ pxNext = ( signed char * ) pcString;\r
+ while( *pxNext )\r
+ {\r
+ xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );\r
+ pxNext++;\r
+ }\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed char cOutChar, portTickType xBlockTime )\r
+{\r
+signed portBASE_TYPE xReturn;\r
+\r
+ /* check if we are already transmitting */\r
+ if ( (serialSCI_SETINT_REG & serialSCI_TX_INT) == 0)\r
+ {\r
+ /* First byte */\r
+\r
+ /* Wait until IDLE idle period is finished */\r
+ while ( (serialSCI_FLR_REG & serialSCI_IDLE_FLG) != 0 ) \r
+ { \r
+ /* wait */ \r
+ };\r
+ \r
+ /* Need to send first byte before interrupts flags are set. */\r
+ serialSCI_TD_REG = cOutChar;\r
+ \r
+ /* Enable the TX interrupt. */\r
+ serialSCI_SETINT_REG = serialSCI_TX_INT;\r
+\r
+ xReturn = pdPASS;\r
+ }\r
+ else if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) == pdPASS )\r
+ {\r
+ xReturn = pdPASS;\r
+ }\r
+ else\r
+ {\r
+ xReturn = pdFAIL;\r
+ }\r
+\r
+ return xReturn;\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+void vSerialClose( xComPortHandle xPort )\r
+{\r
+ /* Not supported as not required by the demo application. */\r
+}\r
+/*-----------------------------------------------------------*/\r
+\r
+__interrupt void vSCIInterruptHandler( void )\r
+{\r
+/* xHigherPriorityTaskWoken must be initialised to pdFALSE. */\r
+portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;\r
+char cChar;\r
+portBASE_TYPE xVectorValue = serialSCI_INTVEC0_REG;\r
+\r
+ switch( xVectorValue )\r
+ {\r
+ case 11:\r
+ /* Receive buffer full interrupt, send received char to queue */\r
+ cChar = serialSCI_RD_REG;\r
+ xQueueSendFromISR( xRxedChars, &cChar, &xHigherPriorityTaskWoken );\r
+ break;\r
+\r
+ case 12:\r
+ /* Transmit buffer empty interrupt received */\r
+ /* Are there any more characters to transmit? */\r
+ if( xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken ) == pdTRUE )\r
+ {\r
+ /* A character was retrieved from the queue so can be sent to\r
+ the TD now. */\r
+ serialSCI_TD_REG = cChar;\r
+ }\r
+ else\r
+ {\r
+ /* no more bytes, clear the TX interrupt */\r
+ serialSCI_CLRINT_REG = serialSCI_TX_INT;\r
+ }\r
+ break;\r
+\r
+ default:\r
+ /* unused interrupt, clear flags */\r
+ serialSCI_FLR_REG = 0x07000003;\r
+ }\r
+\r
+ /* If calling xQueueSendFromISR() above caused a task to leave the blocked\r
+ state, and the task that left the blocked state has a priority above the\r
+ task that this interrupt interrupted, then xHighPriorityTaskWoken will have\r
+ been set to pdTRUE. If xHigherPriorityTaskWoken equals true then calling\r
+ portYIELD_FROM_ISR() will result in this interrupt returning directly to the\r
+ unblocked task. */\r
+ portYIELD_FROM_ISR( xHigherPriorityTaskWoken );\r
+}\r
+\r
+\r
+\r
+\r
+\r
+ \r
--- /dev/null
+/*----------------------------------------------------------------------------*/\r
+/* sys_common.h 10/20/10 15:19:19 */\r
+/* */\r
+/* (c) Texas Instruments 2003-2010, All rights reserved. */\r
+/* */\r
+\r
+\r
+#ifndef __sys_common_h__\r
+#define __sys_common_h__\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* NULL */\r
+\r
+#ifndef NULL\r
+#define NULL ((void *) 0)\r
+#endif\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Error Codes */\r
+\r
+#define IO_E_OK 0U\r
+#define IO_E_BUSY 1U\r
+#define IO_E_UNKNOWN_MODE 2U\r
+#define IO_E_OVR 3U\r
+#define IO_E_FCN_SUSPENDED 16U\r
+#define IO_E_PARAM_IGNORED 17U\r
+#define IO_E_INVALID_CHANNEL_ID 18U\r
+#define IO_E_INVALID_VALUE 19U\r
+#define IO_E_INVALID_SIZE 20U\r
+#define IO_E_INVALID_POSITION 21U\r
+#define IO_E_INVALID_NOTIF_TYPE 22U\r
+#define IO_E_MISSING_INIT 64U\r
+#define IO_E_INVALID_GROUP_ID 66U\r
+#define IO_E_INVALID_POINTER 67U\r
+#define IO_E_INVALID_NODE 68U\r
+#define IO_E_INVALID_CAN_ID 69U\r
+#define IO_E_INVALID_OVR 70U\r
+#define IO_E_INVALID_CONFIG 72U\r
+#define IO_E_MISSING_CONNECT 73U\r
+#define IO_E_MISSING_DISCONNECT 74U\r
+#define IO_E_ALREADY_CONNECTED 75U\r
+#define IO_E_GRP_NOTACTIVATED 80U\r
+#define IO_E_INVALID_RESULT 81U\r
+#define IO_E_TIMEOUT 82U\r
+#define IO_E_INVALID_PARITY 83U\r
+#define IO_E_SINGLE_ERROR 84U\r
+#define IO_E_DOUBLE_ERROR 85U\r
+#define IO_E_SINGLE_ERROR_EVEN 86U\r
+#define IO_E_SINGLE_ERROR_ODD 87U\r
+#define IO_E_DOUBLE_ERROR_EVEN 88U\r
+#define IO_E_DOUBLE_ERROR_ODD 89U\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Device Types */\r
+\r
+#define IO_SPI 0U\r
+#define IO_DIO 1U\r
+#define IO_TIM 2U\r
+#define IO_PWM 3U\r
+#define IO_CCU 4U\r
+#define IO_RTI 5U\r
+#define IO_WDT 6U\r
+#define IO_ADC 7U\r
+#define IO_SCI 8U\r
+#define IO_FLS 9U\r
+#define IO_CAN 10U\r
+#define IO_QSPI 11U\r
+#define IO_MSPI 11U\r
+#define IO_LIN 12U\r
+#define IO_CRC 13U\r
+#define IO_DMA 14U\r
+#define IO_HTU 15U\r
+#define IO_PWD 16U\r
+#define IO_HET 17U\r
+#define IO_ESM 18U\r
+#define IO_I2C 19U\r
+#define IO_ECC 20U\r
+#define IO_VIM 21U\r
+#define IO_STC 22U\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Device States */\r
+\r
+#define IO_STATE_IDLE 0U\r
+#define IO_STATE_ACTIVE 1U\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Notification Types */\r
+\r
+#define IO_N_RISING_EDGE 0U\r
+#define IO_N_FALLING_EDGE 1U\r
+#define IO_N_THRESHOLD_1 2U\r
+#define IO_N_THRESHOLD_2 3U\r
+#define IO_N_CAPTURE 4U\r
+#define IO_N_ALL 5U\r
+#define IO_N_ROLLOVER 6U\r
+#define IO_N_READY 7U\r
+#define IO_N_FCN_SUSPENDED 8U\r
+#define IO_N_PARITY_ERROR 9U\r
+#define IO_N_FRAMING_ERROR 10U\r
+#define IO_N_BUFFER_OVERRUN 11U\r
+#define IO_N_RECEIVE 12U\r
+#define IO_N_TRANSMIT 13U\r
+#define IO_N_TX_ERROR 15U\r
+#define IO_N_RX_ERROR 16U\r
+#define IO_N_BAUDRATE_ERROR 17U\r
+#define IO_N_PHASE_ERROR 18U\r
+#define IO_N_OCSET 19U\r
+#define IO_N_OCRESET 20U\r
+#define IO_N_RX_LOST 21U\r
+#define IO_N_ACTIVE 22U\r
+#define IO_N_WARNING 23U\r
+#define IO_N_PASSIVE 24U\r
+#define IO_N_BUS_OFF 25U\r
+#define IO_N_WAKE_UP 26U\r
+#define IO_N_LAST_ERROR 27U\r
+#define IO_N_GRP_READY 30U\r
+#define IO_N_ERROR 31U\r
+#define IO_N_HDR_RECEIVE 32U\r
+#define IO_N_HDR_TRANSMIT 33U\r
+#define IO_N_ID_ERROR 34U\r
+#define IO_N_CHECKSUM_ERROR 35U\r
+#define IO_N_BIT_ERROR 36U\r
+#define IO_N_FRAME_TIMEOUT 37U\r
+#define IO_N_BUS_ERROR 38U\r
+#define IO_N_SYNC_FIELD_ERROR 39U\r
+#define IO_N_WAKE_UP_RECEIVE 40U\r
+#define IO_N_WAKE_UP_TRANSMIT 41U\r
+#define IO_N_ADJUST_BAUDRATE 42U\r
+#define IO_N_BUS_IDLE_TIMEOUT 43U\r
+#define IO_N_WAKE_UP_TIMEOUT 44U\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Programming Interface Constants */\r
+\r
+#define IO_LOW 0U\r
+#define IO_HIGH 1U\r
+#define IO_INVALID 0xFFFFU\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Data Types */\r
+\r
+typedef T_U32 IO_ErrorType;\r
+typedef T_U32 IO_DeviceType;\r
+typedef T_U32 IO_FunctionNrType;\r
+typedef T_U32 IO_DeviceStateType;\r
+typedef T_U32 IO_ChannelType;\r
+typedef T_U32 IO_ModeType;\r
+typedef T_U32 IO_ValueType;\r
+typedef T_U32 IO_U32;\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Error hook */\r
+\r
+void IO_ErrorHook(IO_DeviceType device, IO_ErrorType error);\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* ISR Function Prototypes */\r
+\r
+void IO_PHANTOM_INT(void);\r
+void IO_ESM_INT_HIGH(void);\r
+void IO_TIM0_INT(void);\r
+void IO_TIM1_INT(void);\r
+void IO_DIO_INT_HIGH(void);\r
+void IO_HET_INT_HIGH(void);\r
+void IO_HTU_INT_HIGH(void);\r
+void IO_MIBSPI1_INT_HIGH(void);\r
+void IO_LIN_INT_HIGH(void);\r
+void IO_MIBADC_INT_GROUP0(void);\r
+void IO_MIBADC_INT_GROUP1(void);\r
+void IO_CAN1_INT_HIGH(void);\r
+void IO_SPI2_INT_HIGH(void);\r
+void IO_ESM_INT_LOW(void);\r
+void IO_DIO_INT_LOW(void);\r
+void IO_HET_INT_LOW(void);\r
+void IO_HTU_INT_LOW(void);\r
+void IO_MIBSPI1_INT_LOW(void);\r
+void IO_LIN_INT_LOW(void);\r
+void IO_MIBADC_INT_GROUP2(void);\r
+void IO_CAN1_INT_LOW(void);\r
+void IO_SPI2_INT_LOW(void);\r
+void IO_MIBADC_INT_MAG(void);\r
+void IO_DMA_INT_FTCA(void);\r
+void IO_DMA_INT_LFSA(void);\r
+void IO_CAN2_INT_HIGH(void);\r
+void IO_MIBSPI3_INT_HIGH(void);\r
+void IO_MIBSPI3_INT_LOW(void);\r
+void IO_DMA_INT_HBCA(void);\r
+void IO_DMA_INT_BTCA(void);\r
+void IO_CAN2_INT_LOW(void);\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Notification Function Prototypes */\r
+\r
+\r
+#endif\r
+/*----------------------------------------------------------------------------*/\r
+\r
--- /dev/null
+;-------------------------------------------------------------------------------\r
+; sys_core.asm\r
+;\r
+; (c) Texas Instruments 2009, All rights reserved.\r
+;\r
+\r
+ .text\r
+ .arm\r
+\r
+;-------------------------------------------------------------------------------\r
+; Initialize CPU Registers\r
+\r
+ .def _coreInitRegisters\r
+\r
+_coreInitRegisters:\r
+ mov r0, lr\r
+ mov r1, #0x0000\r
+ mov r2, #0x0000\r
+ mov r3, #0x0000\r
+ mov r4, #0x0000\r
+ mov r5, #0x0000\r
+ mov r6, #0x0000\r
+ mov r7, #0x0000\r
+ mov r8, #0x0000\r
+ mov r9, #0x0000\r
+ mov r10, #0x0000\r
+ mov r11, #0x0000\r
+ mov r12, #0x0000\r
+ mov r13, #0x0000\r
+ cps #0x11 \r
+ mov lr, r0\r
+ mov r8, #0x0000\r
+ mov r9, #0x0000\r
+ mov r10, #0x0000\r
+ mov r11, #0x0000\r
+ mov r12, #0x0000\r
+ mov r13, #0x0000\r
+ cps #0x12 \r
+ mov r13, #0x0000\r
+ mov lr, r0\r
+ cps #0x17\r
+ mov r13, #0x0000\r
+ mov lr, r0\r
+ cps #0x1B\r
+ mov r13, #0x0000\r
+ mov lr, r0\r
+ cps #0x13\r
+ mov r13, #0x0000\r
+\r
+ .if (__TI_VFPV3D16_SUPPORT__)\r
+ fmdrr d0, r1, r1\r
+ fmdrr d1, r1, r1\r
+ fmdrr d2, r1, r1\r
+ fmdrr d3, r1, r1\r
+ fmdrr d4, r1, r1\r
+ fmdrr d5, r1, r1\r
+ fmdrr d6, r1, r1\r
+ fmdrr d7, r1, r1\r
+ fmdrr d8, r1, r1\r
+ fmdrr d9, r1, r1\r
+ fmdrr d10, r1, r1\r
+ fmdrr d11, r1, r1\r
+ fmdrr d12, r1, r1\r
+ fmdrr d13, r1, r1\r
+ fmdrr d14, r1, r1\r
+ fmdrr d15, r1, r1\r
+ .endif\r
+\r
+ bl $+4\r
+ bl $+4\r
+ bl $+4\r
+ bl $+4\r
+ bx r0\r
+\r
+\r
+;-------------------------------------------------------------------------------\r
+; Initialize Stack Pointers\r
+\r
+ .def _coreInitStackPointer\r
+\r
+_coreInitStackPointer:\r
+ msr cpsr_c, #0xD1\r
+ ldr sp, fiqSp\r
+ msr cpsr_c, #0xD2\r
+ ldr sp, irqSp\r
+ msr cpsr_c, #0xD7\r
+ ldr sp, abortSp\r
+ msr cpsr_c, #0xDB\r
+ ldr sp, undefSp\r
+ msr cpsr_c, #0xDF\r
+ ldr sp, userSp\r
+ msr cpsr_c, #0xD3\r
+ ldr sp, svcSp\r
+ bx lr\r
+\r
+userSp .word 0x00000000+0x00000000\r
+svcSp .word 0x08000000+0x00000100\r
+fiqSp .word 0x00000000+0x00000000\r
+irqSp .word 0x08000100+0x00000100\r
+abortSp .word 0x00000000+0x00000000\r
+undefSp .word 0x00000000+0x00000000\r
+\r
+\r
+;-------------------------------------------------------------------------------\r
+; Enable VFP Unit\r
+\r
+ .def _coreEnableVfp\r
+\r
+_coreEnableVfp:\r
+ .if (__TI_VFPV3D16_SUPPORT__)\r
+ mrc p15, #0x00, r0, c1, c0, #0x02\r
+ orr r0, r0, #0xF00000\r
+ mcr p15, #0x00, r0, c1, c0, #0x02\r
+ mov r0, #0x40000000\r
+ fmxr fpexc, r0\r
+ .endif\r
+ bx lr\r
+\r
+\r
+;-------------------------------------------------------------------------------\r
+; Enable Event Bus Export\r
+\r
+ .def _coreEnableEventBusExport\r
+\r
+_coreEnableEventBusExport:\r
+ mrc p15, #0x00, r0, c9, c12, #0x00\r
+ orr r0, r0, #0x10\r
+ mcr p15, #0x00, r0, c9, c12, #0x00\r
+ bx lr\r
+\r
+;-------------------------------------------------------------------------------\r
+; Enable RAM ECC Support\r
+\r
+ .def _coreEnableRamEcc\r
+\r
+_coreEnableRamEcc:\r
+ mrc p15, #0x00, r0, c1, c0, #0x01\r
+ orr r0, r0, #0x0C000000\r
+ mcr p15, #0x00, r0, c1, c0, #0x01\r
+ bx lr\r
+\r
+;-------------------------------------------------------------------------------\r
+; Enable Flash ECC Support\r
+\r
+ .def _coreEnableFlashEcc\r
+\r
+_coreEnableFlashEcc:\r
+ mrc p15, #0x00, r0, c1, c0, #0x01\r
+ orr r0, r0, #0x02000000\r
+ mcr p15, #0x00, r0, c1, c0, #0x01\r
+ bx lr\r
+\r
+;-------------------------------------------------------------------------------\r
+; Enable Offset via Vic controller\r
+\r
+ .def _coreEnableIrqVicOffset\r
+\r
+_coreEnableIrqVicOffset:\r
+ mrc p15, #0, r0, c1, c0, #0\r
+ orr r0, r0, #0x01000000\r
+ mcr p15, #0, r0, c1, c0, #0\r
+ bx lr\r
+ \r
+;-------------------------------------------------------------------------------\r
+\r
--- /dev/null
+/** @file sys_core.h\r
+* @brief System Core Header File\r
+* @date 23.July.2009\r
+* @version 1.00.000\r
+* \r
+* This file contains:\r
+* - Core Interface Functions\r
+* .\r
+* which are relevant for the System driver.\r
+*/\r
+\r
+/* (c) Texas Instruments 2009, All rights reserved. */\r
+\r
+#ifndef __SYS_CORE_H__\r
+#define __SYS_CORE_H__\r
+\r
+/* System Core Interface Functions */\r
+\r
+/** @fn void _coreInitRegisters_(void)\r
+* @brief Initialize Core register\r
+*/\r
+void _coreInitRegisters(void);\r
+\r
+/** @fn void _coreInitStackPointer_(void)\r
+* @brief Initialize Core stack pointer\r
+*/\r
+void _coreInitStackPointer(void);\r
+\r
+/** @fn void _coreEnableIrqVicOffset_(void)\r
+* @brief Enable Irq offset propagation via Vic controller\r
+*/\r
+void _coreEnableIrqVicOffset(void);\r
+\r
+\r
+/** @fn void _coreEnableEventBusExport_(void)\r
+* @brief Enable event bus export for external monitoring modules\r
+* @note It is required to enable event bus export to process ecc issues.\r
+*\r
+* This function enables event bus exports to external monitoring modules\r
+* like tightly coupled RAM wrapper, Flash wrapper and error signaling module.\r
+*/\r
+void _coreEnableEventBusExport(void);\r
+\r
+/** @fn void _coreEnableRamEcc_(void)\r
+* @brief Enable external ecc error for RAM odd and even bank\r
+* @note It is required to enable event bus export to process ecc issues.\r
+*/\r
+void _coreEnableRamEcc(void);\r
+\r
+/** @fn void _coreEnableFlashEcc_(void)\r
+* @brief Enable external ecc error for the Flash\r
+* @note It is required to enable event bus export to process ecc issues.\r
+*/\r
+void _coreEnableFlashEcc(void);\r
+\r
+/** @fn void _coreEnableVfp(void)\r
+* @brief Enable Cortex-R4 FPU\r
+*/\r
+void _coreEnableVfp();\r
+\r
+#endif\r
--- /dev/null
+/** @file sys_esm.c\r
+* @brief Phantom Interrupt Source File\r
+* @date 15.July.2009\r
+* @version 1.00.000\r
+*\r
+* This file contains:\r
+* - Phantom Interrupt Handler\r
+*/\r
+\r
+#include "gio.h"\r
+#include "het.h"\r
+\r
+\r
+/* ESM (Non-Maskable) Interrupt Handler */\r
+\r
+#pragma INTERRUPT(esmHighLevelInterrupt, FIQ)\r
+\r
+void esmHighLevelInterrupt(void)\r
+{\r
+ /* too indicate we are in the ESM interrupt light up the BLUE leds */\r
+\r
+ /* Initalise the IO ports that drive the LEDs */\r
+ gioSetDirection(hetPORT, 0xFFFFFFFF);\r
+ /* switch all leds off */\r
+ gioSetPort(hetPORT, 0x08110034);\r
+ /* switch on blue leds */\r
+ gioSetBit(hetPORT, 5, 0);\r
+ gioSetBit(hetPORT, 27, 0);\r
+\r
+ for(;;);\r
+}\r
--- /dev/null
+;-------------------------------------------------------------------------------\r
+; sys_intvecs.asm\r
+;\r
+; (c) Texas Instruments 2009-2010, All rights reserved.\r
+;\r
+\r
+ .sect ".intvecs"\r
+\r
+;-------------------------------------------------------------------------------\r
+; import reference for interrupt routines\r
+\r
+ .ref _c_int00\r
+ .ref vPortYieldProcessor\r
+\r
+;-------------------------------------------------------------------------------\r
+; interrupt vectors\r
+\r
+ b _c_int00 ; reset\r
+ b #-8 ; undefined instruction\r
+ b vPortYieldProcessor ; software interrupt\r
+ b #-8 ; Abort (prefetch)\r
+ b #-8 ; Abort (data)\r
+ b #-8 ; Reserved\r
+ ldr pc,[pc,#-0x1b0] ; IRQ\r
+ ldr pc,[pc,#-0x1b0] ; FIQ\r
+\r
+\r
+;-------------------------------------------------------------------------------\r
--- /dev/null
+;-------------------------------------------------------------------------------\r
+; sys_memory.asm\r
+;\r
+; (c) Texas Instruments 2009, All rights reserved.\r
+;\r
+\r
+ .text\r
+ .arm\r
+\r
+\r
+;-------------------------------------------------------------------------------\r
+; Initialize memory\r
+\r
+ .def _memoryInit\r
+\r
+_memoryInit:\r
+ ldr r12, regMinitGcr ; MINITGCR register pointer \r
+ mov r4, #0xA\r
+ str r4, [r12]\r
+ ldr r4, ramInitMask ; load RAM initialization mask\r
+ str r4, [r12, #4]\r
+mloop\r
+ ldr r5, [r12, #12]\r
+ tst r5, #0x100\r
+ beq mloop\r
+ mov r4, #5\r
+ str r4, [r12]\r
+ bx lr\r
+ \r
+ramInitMask .word 0x00000001\r
+regMinitGcr .word 0xFFFFFF5C\r
+\r
+ \r
+\r
+;-------------------------------------------------------------------------------\r
+\r
--- /dev/null
+/** @file sys_memory.h\r
+* @brief System Memory Header File\r
+* @date 23.July.2009\r
+* @version 1.00.000\r
+* \r
+* This file contains:\r
+* - Memory Interface Functions\r
+* .\r
+* which are relevant for the System driver.\r
+*/\r
+\r
+/* (c) Texas Instruments 2009, All rights reserved. */\r
+\r
+#ifndef __SYS_MEMORY_H__\r
+#define __SYS_MEMORY_H__\r
+\r
+/** @fn void _memoryInit_(void)\r
+* @brief Automatic hardware memory initialization\r
+*/\r
+void _memoryInit(void);\r
+\r
+#endif\r
--- /dev/null
+/** @file sys_phantom.c \r
+* @brief Phantom Interrupt Source File\r
+* @date 15.July.2009\r
+* @version 1.00.000\r
+*\r
+* This file contains:\r
+* - Phantom Interrupt Handler\r
+*/\r
+\r
+#include "gio.h"\r
+#include "het.h"\r
+\r
+\r
+/* Phantom Interrupt Handler */\r
+\r
+#pragma INTERRUPT(phantomInterrupt, IRQ)\r
+\r
+void phantomInterrupt(void)\r
+{\r
+ /* too indicate we are in the phantom interrupt light up the BLUE leds */\r
+\r
+ /* Initalise the IO ports that drive the LEDs */\r
+ gioSetDirection(hetPORT, 0xFFFFFFFF);\r
+ /* switch all leds off */\r
+ gioSetPort(hetPORT, 0x08110034);\r
+ /* switch on blue leds */\r
+ gioSetBit(hetPORT, 5, 0);\r
+ gioSetBit(hetPORT, 27, 0);\r
+\r
+ for(;;);\r
+}\r
--- /dev/null
+/** @file sys_startup.c \r
+* @brief Startup Source File\r
+* @date 05.November.2010\r
+* @version 1.01.001\r
+*\r
+* This file contains:\r
+* - Include Files\r
+* - Type Definitions\r
+* - External Functions\r
+* - VIM RAM Setup\r
+* - Startup Routine\r
+* .\r
+* which are relevant for the Starup.\r
+*/\r
+\r
+/* (c) Texas Instruments 2010, All rights reserved. */\r
+\r
+/* Include Files */\r
+\r
+#include "sys_types.h"\r
+#include "sys_common.h"\r
+#include "sys_system.h"\r
+#include "sys_vim.h"\r
+#include "sys_core.h"\r
+#include "sys_memory.h"\r
+\r
+\r
+/* External Functions */\r
+\r
+extern void __TI_auto_init(void);\r
+extern void main(void);\r
+extern void exit(int);\r
+\r
+/* Vim Ram Definition */\r
+/** @struct vimRam\r
+* @brief Vim Ram Definition\r
+*\r
+* This type is used to access the Vim Ram.\r
+*/\r
+\r
+static const t_isrFuncPTR s_vim_init[] =\r
+{\r
+ phantomInterrupt,\r
+ esmHighLevelInterrupt,\r
+ phantomInterrupt,\r
+ vPortPreemptiveTick, /* RTI */\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ vPortYeildWithinAPI, /* software interrupt */\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+ phantomInterrupt,\r
+};\r
+\r
+\r
+/* Startup Routine */\r
+\r
+#pragma INTERRUPT(_c_int00, RESET)\r
+\r
+void _c_int00()\r
+{\r
+ /* Enable VFP Unit */\r
+ _coreEnableVfp();\r
+\r
+ /* Initialize Core Registers */\r
+ _coreInitRegisters();\r
+\r
+ /* Initialize Stack Pointers */\r
+ _coreInitStackPointer();\r
+\r
+ /* Enable IRQ offset via Vic controller */\r
+ _coreEnableIrqVicOffset();\r
+\r
+ /* Initialize System */\r
+ systemInit();\r
+\r
+ /* Initialize VIM table */\r
+ {\r
+ unsigned i;\r
+\r
+ for (i = 0; i < 96U; i++)\r
+ {\r
+ vimRAM->ISR[i] = s_vim_init[i];\r
+ }\r
+ }\r
+\r
+ /* set IRQ/FIQ priorities */\r
+ vimREG->FIRQPR0 = SYS_FIQ\r
+ | (SYS_FIQ << 1U)\r
+ | (SYS_IRQ << 2U)\r
+ | (SYS_IRQ << 3U)\r
+ | (SYS_IRQ << 4U)\r
+ | (SYS_IRQ << 5U)\r
+ | (SYS_IRQ << 6U)\r
+ | (SYS_IRQ << 7U)\r
+ | (SYS_IRQ << 8U)\r
+ | (SYS_IRQ << 9U)\r
+ | (SYS_IRQ << 10U)\r
+ | (SYS_IRQ << 11U)\r
+ | (SYS_IRQ << 12U)\r
+ | (SYS_IRQ << 13U)\r
+ | (SYS_IRQ << 14U)\r
+ | (SYS_IRQ << 15U)\r
+ | (SYS_IRQ << 16U)\r
+ | (SYS_IRQ << 17U)\r
+ | (SYS_IRQ << 18U)\r
+ | (SYS_IRQ << 19U)\r
+ | (SYS_IRQ << 20U)\r
+ | (SYS_IRQ << 21U)\r
+ | (SYS_IRQ << 22U)\r
+ | (SYS_IRQ << 23U)\r
+ | (SYS_IRQ << 24U)\r
+ | (SYS_IRQ << 25U)\r
+ | (SYS_IRQ << 26U)\r
+ | (SYS_IRQ << 27U)\r
+ | (SYS_IRQ << 28U)\r
+ | (SYS_IRQ << 29U)\r
+ | (SYS_IRQ << 30U)\r
+ | (SYS_IRQ << 31U);\r
+\r
+ vimREG->FIRQPR1 = SYS_IRQ\r
+ | (SYS_IRQ << 1U)\r
+ | (SYS_IRQ << 2U)\r
+ | (SYS_IRQ << 3U)\r
+ | (SYS_IRQ << 4U)\r
+ | (SYS_IRQ << 5U)\r
+ | (SYS_IRQ << 6U)\r
+ | (SYS_IRQ << 7U)\r
+ | (SYS_IRQ << 8U)\r
+ | (SYS_IRQ << 9U)\r
+ | (SYS_IRQ << 10U)\r
+ | (SYS_IRQ << 11U)\r
+ | (SYS_IRQ << 12U)\r
+ | (SYS_IRQ << 13U)\r
+ | (SYS_IRQ << 14U)\r
+ | (SYS_IRQ << 15U)\r
+ | (SYS_IRQ << 16U)\r
+ | (SYS_IRQ << 17U)\r
+ | (SYS_IRQ << 18U)\r
+ | (SYS_IRQ << 19U)\r
+ | (SYS_IRQ << 20U)\r
+ | (SYS_IRQ << 21U)\r
+ | (SYS_IRQ << 22U)\r
+ | (SYS_IRQ << 23U)\r
+ | (SYS_IRQ << 24U)\r
+ | (SYS_IRQ << 25U)\r
+ | (SYS_IRQ << 26U)\r
+ | (SYS_IRQ << 27U)\r
+ | (SYS_IRQ << 28U)\r
+ | (SYS_IRQ << 29U)\r
+ | (SYS_IRQ << 30U);\r
+\r
+ /* enable interrupts */\r
+ vimREG->REQMASKSET0 = 1U\r
+ | (0U << 1)\r
+ | (1U << 2) /* RTI */\r
+ | (0U << 3)\r
+ | (0U << 4)\r
+ | (0U << 5)\r
+ | (0U << 6)\r
+ | (0U << 7)\r
+ | (0U << 8)\r
+ | (0U << 9)\r
+ | (0U << 10)\r
+ | (0U << 11)\r
+ | (0U << 12)\r
+ | (0U << 13)\r
+ | (0U << 14)\r
+ | (0U << 15)\r
+ | (0U << 16)\r
+ | (0U << 17)\r
+ | (0U << 18)\r
+ | (0U << 19)\r
+ | (0U << 20)\r
+ | (1U << 21) /* Software Interrupt */\r
+ | (0U << 22)\r
+ | (0U << 23)\r
+ | (0U << 24)\r
+ | (0U << 25)\r
+ | (0U << 26)\r
+ | (0U << 27)\r
+ | (0U << 28)\r
+ | (0U << 29)\r
+ | (0U << 30)\r
+ | (0U << 31);\r
+\r
+ vimREG->REQMASKSET1 = 0U\r
+ | (0U << 1)\r
+ | (0U << 2)\r
+ | (0U << 3)\r
+ | (0U << 4)\r
+ | (0U << 5)\r
+ | (0U << 6)\r
+ | (0U << 7)\r
+ | (0U << 8)\r
+ | (0U << 9)\r
+ | (0U << 10)\r
+ | (0U << 11)\r
+ | (0U << 12)\r
+ | (0U << 13)\r
+ | (0U << 14)\r
+ | (0U << 15)\r
+ | (0U << 16)\r
+ | (0U << 17)\r
+ | (0U << 18)\r
+ | (0U << 19)\r
+ | (0U << 20)\r
+ | (0U << 21)\r
+ | (0U << 22)\r
+ | (0U << 23)\r
+ | (0U << 24)\r
+ | (0U << 25)\r
+ | (0U << 26)\r
+ | (0U << 27)\r
+ | (0U << 28)\r
+ | (0U << 29)\r
+ | (0U << 30);\r
+\r
+\r
+ /* initalise global variable and constructors */\r
+ __TI_auto_init();\r
+\r
+ /* call the application */\r
+ main();\r
+ exit(0);\r
+}\r
+\r
+\r
--- /dev/null
+/** @file system.c \r
+* @brief System Driver Source File\r
+* @date 05.November.2010\r
+* @version 1.01.000\r
+*\r
+* This file contains:\r
+* - API Funcions\r
+* .\r
+* which are relevant for the System driver.\r
+*/\r
+\r
+/* (c) Texas Instruments 2010, All rights reserved. */\r
+\r
+\r
+/* Include Files */\r
+\r
+#include "sys_system.h"\r
+\r
+\r
+/** @fn void systemInit(void)\r
+* @brief Initializes System Driver\r
+*\r
+* This function initializes the System driver.\r
+*\r
+*/\r
+\r
+\r
+void systemInit(void)\r
+{\r
+ /** @b Initialize @b Flash @b Wrapper: */\r
+\r
+ /** - Setup flash read mode, address wait states and data wait states */\r
+ flashWREG->FRDCNTL = 0x01000000U \r
+ | (3U << 8U) \r
+ | (1U << 4U) \r
+ | 1U;\r
+\r
+#if 0\r
+ /** - Setup flash bank power modes */\r
+ flashWREG->FBFALLBACK = 0x05050000\r
+ | (SYS_ACTIVE << 14U)\r
+ | (SYS_SLEEP << 12U)\r
+ | (SYS_SLEEP << 10U)\r
+ | (SYS_SLEEP << 8U)\r
+ | (SYS_SLEEP << 6U)\r
+ | (SYS_SLEEP << 4U)\r
+ | (SYS_ACTIVE << 2U)\r
+ | SYS_ACTIVE;\r
+\r
+ /** @b Initialize @b Lpo: */\r
+ {\r
+ unsigned trim = *(volatile unsigned short *)0xF00801B4;\r
+\r
+ if (trim != 0xFFFF)\r
+ {\r
+ systemREG1->LPOMONCTL = (1U << 24U)\r
+ | (0U << 16U)\r
+ | trim;\r
+ }\r
+ else\r
+ {\r
+ systemREG1->LPOMONCTL = (1U << 24U)\r
+ | (0U << 16U)\r
+ | (systemREG1->LPOMONCTL & 0xFFFF);\r
+ }\r
+ }\r
+#endif\r
+\r
+ /** @b Initialize @b Pll: */\r
+\r
+ /** - Setup pll control register 1:\r
+ * - Setup reset on oscillator slip \r
+ * - Setup bypass on pll slip\r
+ * - Setup Pll output clock divider\r
+ * - Setup reset on oscillator fail\r
+ * - Setup reference clock divider \r
+ * - Setup Pll multiplier \r
+ */\r
+\r
+ /* 180Mhz */\r
+ systemREG1->PLLCTL1 = 0x00000000U \r
+ | 0x20000000U \r
+ | (0U << 24U) \r
+ | 0x00000000U \r
+ | (5U << 16U) \r
+ | (134U << 8U);\r
+\r
+ /** - Setup pll control register 1 \r
+ * - Enable/Disable frequency modulation\r
+ * - Setup spreading rate\r
+ * - Setup bandwidth adjustment\r
+ * - Setup internal Pll output divider\r
+ * - Setup spreading amount\r
+ */\r
+ systemREG1->PLLCTL2 = 0x00000000U\r
+ | (255U << 22U)\r
+ | (7U << 12U)\r
+ | (1U << 9U)\r
+ | 61U;\r
+\r
+ /** @b Initialize @b Clock @b Tree: */\r
+\r
+ /** - Start clock source lock */\r
+ systemREG1->CSDISCLR = 0x00000000U\r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000000U \r
+ | 0x00000002U; \r
+\r
+ /** - Wait for until clocks are locked */\r
+ while ((systemREG1->CSVSTAT & 0x00000002U) == 0x00); /* wait for PLL */\r
+\r
+ /** - Setup GCLK, HCLK and VCLK clock source for normal operation, power down mode and after wakeup */\r
+ systemREG1->GHVSRC = (SYS_PLL << 24U) \r
+ | (SYS_PLL << 16U) \r
+ | SYS_PLL;\r
+\r
+ /** - Power-up all peripharals */\r
+ pcrREG->PSPWRDWNCLR0 = 0xFFFFFFFFU;\r
+ pcrREG->PSPWRDWNCLR1 = 0xFFFFFFFFU;\r
+ pcrREG->PSPWRDWNCLR2 = 0xFFFFFFFFU;\r
+ pcrREG->PSPWRDWNCLR3 = 0xFFFFFFFFU;\r
+\r
+ /** - Setup synchronous peripheral clock dividers for VCLK1 and VCLK2 */\r
+ systemREG1->PENA = 0U;\r
+ systemREG1->VCLKR = 15U;\r
+ systemREG1->VCLK2R = 1U;\r
+ systemREG1->VCLKR = 1U;\r
+\r
+ systemREG2->CLK2CNTRL = (1U << 8U)\r
+ | 1U;\r
+\r
+ /** - Setup RTICLK1 and RTICLK2 clocks */\r
+ systemREG1->RCLKSRC = (1U << 24U)\r
+ | (SYS_VCLK << 16U) \r
+ | (1U << 8U) \r
+ | SYS_VCLK;\r
+\r
+#if 0\r
+ /** - Setup asynchronous peripheral clock sources for AVCLK1 and AVCLK2 */\r
+ systemREG1->VCLKASRC = (SYS_FR_PLL << 8U)\r
+ | SYS_VCLK;\r
+\r
+ /** - Setup asynchronous peripheral clock sources for AVCLK3 and AVCLK4 */\r
+ systemREG2->VCLKACON1 = (0U << 24U)\r
+ | (0U << 20U)\r
+ | (SYS_EXTERNAL2 << 16U)\r
+ | (3U << 8U)\r
+ | (0U << 4U)\r
+ | SYS_EXTERNAL;\r
+#endif\r
+\r
+ /** - Enable Peripherals */\r
+ systemREG1->PENA = 1U;\r
+\r
+ /** @note: HCLK >= VCLK2 >= VCLK_sys */\r
+}\r
+\r
--- /dev/null
+/** @file system.h\r
+* @brief System Driver Header File\r
+* @date 23.July.2009\r
+* @version 1.01.001\r
+* \r
+* This file contains:\r
+* - Definitions\r
+* - Types\r
+* .\r
+* which are relevant for the System driver.\r
+*/\r
+\r
+/* (c) Texas Instruments 2009-2010, All rights reserved. */\r
+\r
+#ifndef __SYS_SYSTEM_H__\r
+#define __SYS_SYSTEM_H__\r
+\r
+\r
+/* System General Definitions */\r
+\r
+/** @enum systemInterrupt\r
+* @brief Alias names for clock sources\r
+*\r
+* This enumeration is used to provide alias names for the clock sources:\r
+* - IRQ\r
+* - FIQ\r
+*/\r
+enum systemInterrupt\r
+{\r
+ SYS_IRQ, /**< Alias for IRQ interrupt */\r
+ SYS_FIQ /**< Alias for FIQ interrupt */\r
+};\r
+\r
+/** @enum systemClockSource\r
+* @brief Alias names for clock sources\r
+*\r
+* This enumeration is used to provide alias names for the clock sources:\r
+* - Oscillator\r
+* - Pll\r
+* - 32 kHz Oscillator\r
+* - External1\r
+* - Low Power Oscillator Low\r
+* - Low Power Oscillator High\r
+* - Flexray Pll\r
+* - External2\r
+* - Synchronous VCLK1\r
+*/\r
+enum systemClockSource\r
+{\r
+ SYS_OSC = 0, /**< Alias for oscillator clock Source */\r
+ SYS_PLL = 1, /**< Alias for Pll clock Source */\r
+ SYS_O32 = 2, /**< Alias for 32 kHz oscillator clock Source */\r
+ SYS_EXTERNAL = 3, /**< Alias for external clock Source */\r
+ SYS_LPO_LOW = 4, /**< Alias for low power oscillator low clock Source */\r
+ SYS_LPO_HIGH = 5, /**< Alias for low power oscillator high clock Source */\r
+ SYS_FR_PLL = 6, /**< Alias for flexray pll clock Source */\r
+ SYS_EXTERNAL2 = 7, /**< Alias for external 2 clock Source */\r
+ SYS_VCLK = 9 /**< Alias for synchronous VCLK1 clock Source */\r
+};\r
+\r
+#define SYS_DOZE_MODE 0x000F3F02U\r
+#define SYS_SNOOZE_MODE 0x000F3F03U\r
+#define SYS_SLEEP_MODE 0x000FFFFFU\r
+\r
+\r
+/** @def SYS_PRE1\r
+* @brief Alias name for RTI1CLK PRE clock source\r
+*\r
+* This is an alias name for the RTI1CLK pre clock source.\r
+* This can be either:\r
+* - Oscillator\r
+* - Pll\r
+* - 32 kHz Oscillator\r
+* - External\r
+* - Low Power Oscillator Low\r
+* - Low Power Oscillator High\r
+* - Flexray Pll\r
+*/\r
+#define SYS_PRE1 SYS_PLL\r
+\r
+/** @def SYS_PRE2\r
+* @brief Alias name for RTI2CLK pre clock source\r
+*\r
+* This is an alias name for the RTI2CLK pre clock source.\r
+* This can be either:\r
+* - Oscillator\r
+* - Pll\r
+* - 32 kHz Oscillator\r
+* - External\r
+* - Low Power Oscillator Low\r
+* - Low Power Oscillator High\r
+* - Flexray Pll\r
+*/\r
+#define SYS_PRE2 SYS_PLL\r
+\r
+\r
+/* System Register Frame 1 Definition */\r
+/** @struct systemBase1\r
+* @brief System Register Frame 1 Definition\r
+*\r
+* This type is used to access the System 1 Registers.\r
+*/\r
+/** @typedef systemBASE1_t\r
+* @brief System Register Frame 1 Type Definition\r
+*\r
+* This type is used to access the System 1 Registers.\r
+*/\r
+typedef volatile struct systemBase1\r
+{\r
+ unsigned SYSPC1; /* 0x0000 */\r
+ unsigned SYSPC2; /* 0x0004 */\r
+ unsigned SYSPC3; /* 0x0008 */\r
+ unsigned SYSPC4; /* 0x000C */\r
+ unsigned SYSPC5; /* 0x0010 */\r
+ unsigned SYSPC6; /* 0x0014 */\r
+ unsigned SYSPC7; /* 0x0018 */\r
+ unsigned SYSPC8; /* 0x001C */\r
+ unsigned SYSPC9; /* 0x0020 */\r
+ unsigned SSWPLL1; /* 0x0024 */\r
+ unsigned SSWPLL2; /* 0x0028 */\r
+ unsigned SSWPLL3; /* 0x002C */\r
+ unsigned CSDIS; /* 0x0030 */\r
+ unsigned CSDISSET; /* 0x0034 */\r
+ unsigned CSDISCLR; /* 0x0038 */\r
+ unsigned CSDDIS; /* 0x003C */\r
+ unsigned CSDDISSET; /* 0x0040 */\r
+ unsigned CSDDISCLR; /* 0x0044 */\r
+ unsigned GHVSRC; /* 0x0048 */\r
+ unsigned VCLKASRC; /* 0x004C */\r
+ unsigned RCLKSRC; /* 0x0050 */\r
+ unsigned CSVSTAT; /* 0x0054 */\r
+ unsigned MSTGCR; /* 0x0058 */\r
+ unsigned MINITGCR; /* 0x005C */\r
+ unsigned MSINENA; /* 0x0060 */\r
+ unsigned MSTFAIL; /* 0x0064 */\r
+ unsigned MSTCGSTAT; /* 0x0068 */\r
+ unsigned MINISTAT; /* 0x006C */\r
+ unsigned PLLCTL1; /* 0x0070 */\r
+ unsigned PLLCTL2; /* 0x0074 */\r
+ unsigned UERFLAG; /* 0x0078 */\r
+ unsigned DIEIDL; /* 0x007C */\r
+ unsigned DIEIDH; /* 0x0080 */\r
+ unsigned VRCTL; /* 0x0084 */\r
+ unsigned LPOMONCTL; /* 0x0088 */\r
+ unsigned CLKTEST; /* 0x008C */\r
+ unsigned DFTCTRLREG1; /* 0x0090 */\r
+ unsigned DFTCTRLREG2; /* 0x0094 */\r
+ unsigned : 32U; /* 0x0098 */\r
+ unsigned : 32U; /* 0x009C */\r
+ unsigned GPREG1; /* 0x00A0 */\r
+ unsigned BTRMSEL; /* 0x00A4 */\r
+ unsigned IMPFASTS; /* 0x00A8 */\r
+ unsigned IMPFTADD; /* 0x00AC */\r
+ unsigned SSISR1; /* 0x00B0 */\r
+ unsigned SSISR2; /* 0x00B4 */\r
+ unsigned SSISR3; /* 0x00B8 */\r
+ unsigned SSISR4; /* 0x00BC */\r
+ unsigned RAMGCR; /* 0x00C0 */\r
+ unsigned BMMCR1; /* 0x00C4 */\r
+ unsigned BMMCR2; /* 0x00C8 */\r
+ unsigned MMUGCR; /* 0x00CC */\r
+#ifdef __little_endian__\r
+ unsigned : 8U; /* 0x00D0 */\r
+ unsigned PENA : 1U; /* 0x00D0 */\r
+ unsigned : 7U; /* 0x00D0 */\r
+ unsigned VCLKR : 4U; /* 0x00D0 */\r
+ unsigned : 4U; /* 0x00D0 */\r
+ unsigned VCLK2R : 4U; /* 0x00D0 */\r
+ unsigned : 4U; /* 0x00D0 */\r
+#else\r
+ unsigned : 4U; /* 0x00D0 */\r
+ unsigned VCLK2R : 4U; /* 0x00D0 */\r
+ unsigned : 4U; /* 0x00D0 */\r
+ unsigned VCLKR : 4U; /* 0x00D0 */\r
+ unsigned : 7U; /* 0x00D0 */\r
+ unsigned PENA : 1U; /* 0x00D0 */\r
+ unsigned : 8U; /* 0x00D0 */\r
+#endif\r
+ unsigned ECPCNTL; /* 0x00D4 */\r
+ unsigned DSPGCR; /* 0x00D8 */\r
+ unsigned DEVCR1; /* 0x00DC */\r
+ unsigned SYSECR; /* 0x00E0 */\r
+ unsigned SYSESR; /* 0x00E4 */\r
+ unsigned ITIFLAG; /* 0x00E8 */\r
+ unsigned GBLSTAT; /* 0x00EC */\r
+ unsigned DEV; /* 0x00F0 */\r
+ unsigned SSIVEC; /* 0x00F4 */\r
+ unsigned SSIF; /* 0x00F8 */\r
+} systemBASE1_t;\r
+\r
+\r
+/** @def systemREG1\r
+* @brief System Register Frame 1 Pointer\r
+*\r
+* This pointer is used by the system driver to access the system frame 1 registers.\r
+*/\r
+#define systemREG1 ((systemBASE1_t *)0xFFFFFF00U)\r
+\r
+/** @def systemPORT\r
+* @brief ECLK GIO Port Register Pointer\r
+*\r
+* Pointer used by the GIO driver to access I/O PORT of System/Eclk\r
+* (use the GIO drivers to access the port pins).\r
+*/\r
+#define systemPORT ((gioPORT_t *)0xFFFFFF04U)\r
+\r
+\r
+/* System Register Frame 2 Definition */\r
+/** @struct systemBase2\r
+* @brief System Register Frame 2 Definition\r
+*\r
+* This type is used to access the System 2 Registers.\r
+*/\r
+/** @typedef systemBASE2_t\r
+* @brief System Register Frame 2 Type Definition\r
+*\r
+* This type is used to access the System 2 Registers.\r
+*/\r
+typedef volatile struct systemBase2\r
+{\r
+ unsigned PLLCTL3; /* 0x0000 */\r
+ unsigned : 32U; /* 0x0004 */\r
+ unsigned STCCLKDIV; /* 0x0008 */\r
+ unsigned CLKHB_GLBREG; /* 0x000C */\r
+ unsigned CLKHB_RTIDREG; /* 0x0010 */\r
+ unsigned HBCD_STAT; /* 0x0014 */\r
+ unsigned : 32U; /* 0x0018 */\r
+ unsigned : 32U; /* 0x001C */\r
+ unsigned CLKTRMI1; /* 0x0020 */\r
+ unsigned ECPCNTRL0; /* 0x0024 */\r
+ unsigned ECPCNTRL1; /* 0x0028 */\r
+ unsigned ECPCNTRL2; /* 0x002C */\r
+ unsigned ECPCNTRL3; /* 0x0030 */\r
+ unsigned : 32U; /* 0x0034 */\r
+ unsigned : 32U; /* 0x0038 */\r
+ unsigned CLK2CNTRL; /* 0x003C */\r
+ unsigned VCLKACON1; /* 0x0040 */\r
+} systemBASE2_t;\r
+\r
+\r
+/** @def systemREG2\r
+* @brief System Register Frame 2 Pointer\r
+*\r
+* This pointer is used by the system driver to access the system frame 2 registers.\r
+*/\r
+#define systemREG2 ((systemBASE2_t *)0xFFFFE100U)\r
+\r
+\r
+/** @struct pcrBase\r
+* @brief Pcr Register Frame Definition\r
+*\r
+* This type is used to access the Pcr Registers.\r
+*/\r
+/** @typedef pcrBASE_t\r
+* @brief PCR Register Frame Type Definition\r
+*\r
+* This type is used to access the PCR Registers.\r
+*/\r
+typedef volatile struct pcrBase\r
+{\r
+ unsigned PMPROTSET0; /* 0x0000 */\r
+ unsigned PMPROTSET1; /* 0x0004 */\r
+ unsigned : 32U; /* 0x0008 */\r
+ unsigned : 32U; /* 0x000C */\r
+ unsigned PMPROTCLR0; /* 0x0010 */\r
+ unsigned PMPROTCLR1; /* 0x0014 */\r
+ unsigned : 32U; /* 0x0018 */\r
+ unsigned : 32U; /* 0x001C */\r
+ unsigned PPROTSET0; /* 0x0020 */\r
+ unsigned PPROTSET1; /* 0x0024 */\r
+ unsigned PPROTSET2; /* 0x0028 */\r
+ unsigned PPROTSET3; /* 0x002C */\r
+ unsigned : 32U; /* 0x0030 */\r
+ unsigned : 32U; /* 0x0034 */\r
+ unsigned : 32U; /* 0x0038 */\r
+ unsigned : 32U; /* 0x003C */\r
+ unsigned PPROTCLR0; /* 0x0040 */\r
+ unsigned PPROTCLR1; /* 0x0044 */\r
+ unsigned PPROTCLR2; /* 0x0048 */\r
+ unsigned PPROTCLR3; /* 0x004C */\r
+ unsigned : 32U; /* 0x0050 */\r
+ unsigned : 32U; /* 0x0054 */\r
+ unsigned : 32U; /* 0x0058 */\r
+ unsigned : 32U; /* 0x005C */\r
+ unsigned PCSPWRDWNSET0; /* 0x0060 */\r
+ unsigned PCSPWRDWNSET1; /* 0x0064 */\r
+ unsigned : 32U; /* 0x0068 */\r
+ unsigned : 32U; /* 0x006C */\r
+ unsigned PCSPWRDWNCLR0; /* 0x0070 */\r
+ unsigned PCSPWRDWNCLR1; /* 0x0074 */\r
+ unsigned : 32U; /* 0x0078 */\r
+ unsigned : 32U; /* 0x007C */\r
+ unsigned PSPWRDWNSET0; /* 0x0080 */\r
+ unsigned PSPWRDWNSET1; /* 0x0084 */\r
+ unsigned PSPWRDWNSET2; /* 0x0088 */\r
+ unsigned PSPWRDWNSET3; /* 0x008C */\r
+ unsigned : 32U; /* 0x0090 */\r
+ unsigned : 32U; /* 0x0094 */\r
+ unsigned : 32U; /* 0x0098 */\r
+ unsigned : 32U; /* 0x009C */\r
+ unsigned PSPWRDWNCLR0; /* 0x00A0 */\r
+ unsigned PSPWRDWNCLR1; /* 0x00A4 */\r
+ unsigned PSPWRDWNCLR2; /* 0x00A8 */\r
+ unsigned PSPWRDWNCLR3; /* 0x00AC */\r
+} pcrBASE_t;\r
+\r
+/** @def pcrREG\r
+* @brief Pcr Register Frame Pointer\r
+*\r
+* This pointer is used by the system driver to access the Pcr registers.\r
+*/\r
+#define pcrREG ((pcrBASE_t *)0xFFFFE000U)\r
+\r
+/* FlashW General Definitions */\r
+\r
+\r
+/** @enum flashWPowerModes\r
+* @brief Alias names for flash bank power modes\r
+*\r
+* This enumeration is used to provide alias names for the flash bank power modes:\r
+* - sleep\r
+* - standby\r
+* - active\r
+*/\r
+enum flashWPowerModes\r
+{\r
+ SYS_SLEEP = 0U, /**< Alias for flash bank power mode sleep */\r
+ SYS_STANDBY = 1U, /**< Alias for flash bank power mode standby */\r
+ SYS_ACTIVE = 3U /**< Alias for flash bank power mode active */\r
+};\r
+\r
+\r
+/** @struct flashWBase\r
+* @brief Flash Wrapper Register Frame Definition\r
+*\r
+* This type is used to access the Flash Wrapper Registers.\r
+*/\r
+/** @typedef flashWBASE_t\r
+* @brief Flash Wrapper Register Frame Type Definition\r
+*\r
+* This type is used to access the Flash Wrapper Registers.\r
+*/\r
+typedef volatile struct flashWBase\r
+{\r
+ unsigned FRDCNTL; /* 0x0000 */\r
+ unsigned FSPRD; /* 0x0004 */\r
+ unsigned FEDACCTRL1; /* 0x0008 */\r
+ unsigned FEDACCTRL2; /* 0x000C */\r
+ unsigned FCORERRCNT; /* 0x0010 */\r
+ unsigned FCORERRADD; /* 0x0014 */\r
+ unsigned FCORERRPOS; /* 0x0018 */\r
+ unsigned FEDACSTATUS; /* 0x001C */\r
+ unsigned FUNCERRADD; /* 0x0020 */\r
+ unsigned FEDACSDIS; /* 0x0024 */\r
+ unsigned FPRIMADDTAG; /* 0x0028 */\r
+ unsigned FREDUADDTAG; /* 0x002C */\r
+ unsigned FBPROT; /* 0x0030 */\r
+ unsigned FBSE; /* 0x0034 */\r
+ unsigned FBBUSY; /* 0x0038 */\r
+ unsigned FBAC; /* 0x003C */\r
+ unsigned FBFALLBACK; /* 0x0040 */\r
+ unsigned FBPRDY; /* 0x0044 */\r
+ unsigned FPAC1; /* 0x0048 */\r
+ unsigned FPAC2; /* 0x004C */\r
+ unsigned FMAC; /* 0x0050 */\r
+ unsigned FMSTAT; /* 0x0054 */\r
+ unsigned FEMUDMSW; /* 0x0058 */\r
+ unsigned FEMUDLSW; /* 0x005C */\r
+ unsigned FEMUECC; /* 0x0060 */\r
+ unsigned FLOCK; /* 0x0064 */\r
+ unsigned FEMUADDR; /* 0x0068 */\r
+ unsigned FDIAGCTRL; /* 0x006C */\r
+ unsigned FRAWDATAH; /* 0x0070 */\r
+ unsigned FRAWDATAL; /* 0x0074 */\r
+ unsigned FRAWECC; /* 0x0078 */\r
+ unsigned FPAROVR; /* 0x007C */\r
+ unsigned FVREADCT; /* 0x0080 */\r
+ unsigned FVHVCT1; /* 0x0084 */\r
+ unsigned FVHVCT2; /* 0x0088 */\r
+ unsigned FVNVCT; /* 0x008C */\r
+ unsigned FVPPCT; /* 0x0090 */\r
+ unsigned FVWLCT; /* 0x0094 */\r
+ unsigned FEFUSE; /* 0x0098 */\r
+ unsigned : 32U; /* 0x009C */\r
+ unsigned : 32U; /* 0x00A0 */\r
+ unsigned : 32U; /* 0x00A4 */\r
+ unsigned : 32U; /* 0x00A8 */\r
+ unsigned : 32U; /* 0x00AC */\r
+ unsigned : 32U; /* 0x00B0 */\r
+ unsigned : 32U; /* 0x00B4 */\r
+ unsigned : 32U; /* 0x00B8 */\r
+ unsigned : 32U; /* 0x00BC */\r
+ unsigned FEDACSDIS2; /* 0x00C0 */\r
+ unsigned : 32U; /* 0x00C4 */\r
+ unsigned : 32U; /* 0x00C8 */\r
+ unsigned : 32U; /* 0x00CC */\r
+ unsigned : 32U; /* 0x00D0 */\r
+ unsigned : 32U; /* 0x00D4 */\r
+ unsigned : 32U; /* 0x00D8 */\r
+ unsigned : 32U; /* 0x00DC */\r
+ unsigned : 32U; /* 0x00E0 */\r
+ unsigned : 32U; /* 0x00E4 */\r
+ unsigned : 32U; /* 0x00E8 */\r
+ unsigned : 32U; /* 0x00EC */\r
+ unsigned : 32U; /* 0x00F0 */\r
+ unsigned : 32U; /* 0x00F4 */\r
+ unsigned : 32U; /* 0x00F8 */\r
+ unsigned : 32U; /* 0x00FC */\r
+ unsigned FBSTROBES; /* 0x0100 */\r
+ unsigned FPSTROBES; /* 0x0104 */\r
+ unsigned FBMODE; /* 0x0108 */\r
+ unsigned FTCR; /* 0x010C */\r
+ unsigned FADDR; /* 0x0110 */\r
+ unsigned FWRITE; /* 0x0114 */\r
+ unsigned FCBITSEL; /* 0x0118 */\r
+ unsigned FTCTRL; /* 0x011C */\r
+ unsigned FWPWRITE0; /* 0x0120 */\r
+ unsigned FWPWRITE1; /* 0x0124 */\r
+ unsigned FWPWRITE2; /* 0x0128 */\r
+ unsigned FWPWRITE3; /* 0x012C */\r
+ unsigned FWPWRITE4; /* 0x0130 */\r
+} flashWBASE_t;\r
+\r
+/** @def flashWREG\r
+* @brief Flash Wrapper Register Frame Pointer\r
+*\r
+* This pointer is used by the system driver to access the flash wrapper registers.\r
+*/\r
+#define flashWREG ((flashWBASE_t *)(0xFFF87000U))\r
+\r
+/* System Interface Functions */\r
+void systemInit(void);\r
+\r
+#endif\r
--- /dev/null
+/*----------------------------------------------------------------------------*/\r
+/* sys_types.h 10/20/10 15:19:19 */\r
+/* */\r
+/* (c) Texas Instruments 2003-2010, All rights reserved. */\r
+/* */\r
+\r
+\r
+#ifndef __sys_types_h__\r
+#define __sys_types_h__\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Standard Types */\r
+\r
+typedef signed char T_S8;\r
+#define MAX_S8 (127)\r
+#define MIN_S8 (-128)\r
+\r
+typedef unsigned char T_U8;\r
+#define MAX_U8 (255)\r
+#define MIN_U8 (0)\r
+\r
+typedef signed short T_S16;\r
+#define MAX_S16 (32767)\r
+#define MIN_S16 (-32767-1)\r
+\r
+typedef unsigned short T_U16;\r
+#define MAX_U16 (0xFFFFU)\r
+#define MIN_U16 (0)\r
+\r
+typedef signed int T_S32;\r
+#define MAX_S32 (2147483647L)\r
+#define MIN_S32 (-2147483647L-1)\r
+\r
+typedef unsigned int T_U32;\r
+#define MAX_U32 (0xFFFFFFFFU)\r
+#define MIN_U32 (0)\r
+\r
+typedef float T_F32;\r
+#define MAX_F32 (3.39e+38)\r
+#define MIN_F32 (1.18e-38)\r
+\r
+typedef double T_F64;\r
+#define MAX_F64 (1.79e+308)\r
+#define MIN_F64 (2.23e-308)\r
+\r
+\r
+#endif\r
+/*----------------------------------------------------------------------------*/\r
+\r
--- /dev/null
+/** @file sys_vim.h\r
+* @brief Vectored Interrupt Module Header File\r
+* @date 05.November.2010\r
+* @version 1.01.000\r
+* \r
+* This file contains:\r
+* - VIM Type Definitions\r
+* - VIM General Definitions\r
+* .\r
+* which are relevant for the Vectored Interrupt Controller.\r
+*/\r
+\r
+/* (c) Texas Instruments 2010, All rights reserved. */\r
+\r
+#ifndef __SYS_VIM_H__\r
+#define __SYS_VIM_H__\r
+\r
+\r
+/* VIM Type Definitions */\r
+\r
+/** @typedef t_isrFuncPTR\r
+* @brief ISR Function Pointer Type Definition\r
+*\r
+* This type is used to access the ISR handler.\r
+*/\r
+typedef void (*t_isrFuncPTR)();\r
+\r
+\r
+/* VIM General Configuration */\r
+\r
+#define VIM_CHANNELS 96U\r
+\r
+/* Interrupt Handlers */\r
+\r
+extern void phantomInterrupt(void);\r
+extern void esmHighLevelInterrupt(void);\r
+\r
+extern void vPortPreemptiveTick(void);\r
+extern void vPortNonPreemptiveTick(void);\r
+extern void vPortYeildWithinAPI(void);\r
+\r
+\r
+/* Vim Register Frame Definition */\r
+/** @struct vimBase\r
+* @brief Vim Register Frame Definition\r
+*\r
+* This type is used to access the Vim Registers.\r
+*/\r
+/** @typedef vimBASE_t\r
+* @brief VIM Register Frame Type Definition\r
+*\r
+* This type is used to access the VIM Registers.\r
+*/\r
+typedef volatile struct vimBase\r
+{\r
+ unsigned : 24U; /* 0x0000 */\r
+ unsigned IRQIVEC : 8U; /* 0x0000 */\r
+ unsigned : 24U; /* 0x0004 */\r
+ unsigned FIQIVEC : 8U; /* 0x0004 */\r
+ unsigned : 32U; /* 0x0008 */\r
+ unsigned : 32U; /* 0x000C */\r
+ unsigned FIRQPR0; /* 0x0010 */\r
+ unsigned FIRQPR1; /* 0x0014 */\r
+ unsigned FIRQPR2; /* 0x0018 */\r
+ unsigned FIRQPR3; /* 0x001C */\r
+ unsigned INTREQ0; /* 0x0020 */\r
+ unsigned INTREQ1; /* 0x0024 */\r
+ unsigned INTREQ2; /* 0x0028 */\r
+ unsigned INTREQ3; /* 0x002C */\r
+ unsigned REQMASKSET0; /* 0x0030 */\r
+ unsigned REQMASKSET1; /* 0x0034 */\r
+ unsigned REQMASKSET2; /* 0x0038 */\r
+ unsigned REQMASKSET3; /* 0x003C */\r
+ unsigned REQMASKCLR0; /* 0x0040 */\r
+ unsigned REQMASKCLR1; /* 0x0044 */\r
+ unsigned REQMASKCLR2; /* 0x0048 */\r
+ unsigned REQMASKCLR3; /* 0x004C */\r
+ unsigned WAKEMASKSET0; /* 0x0050 */\r
+ unsigned WAKEMASKSET1; /* 0x0054 */\r
+ unsigned WAKEMASKSET2; /* 0x0058 */\r
+ unsigned WAKEMASKSET3; /* 0x005C */\r
+ unsigned WAKEMASKCLR0; /* 0x0060 */\r
+ unsigned WAKEMASKCLR1; /* 0x0064 */\r
+ unsigned WAKEMASKCLR2; /* 0x0068 */\r
+ unsigned WAKEMASKCLR3; /* 0x006C */\r
+ unsigned IRQVECREG; /* 0x0070 */\r
+ unsigned FIQVECREQ; /* 0x0074 */\r
+ unsigned : 9U; /* 0x0078 */\r
+ unsigned CAPEVTSRC1 : 7U; /* 0x0078 */\r
+ unsigned : 9U; /* 0x0078 */\r
+ unsigned CAPEVTSRC0 : 7U; /* 0x0078 */\r
+ unsigned : 32U; /* 0x007C */\r
+ unsigned char CHANMAP[64U]; /* 0x0080-0x017C */\r
+} vimBASE_t;\r
+\r
+#define vimREG ((vimBASE_t *)0xFFFFFE00U)\r
+\r
+/** @typedef vimRAM_t\r
+* @brief Vim Ram Type Definition\r
+*\r
+* This type is used to access the Vim Ram.\r
+*/\r
+typedef volatile struct vimRam\r
+{\r
+ t_isrFuncPTR ISR[VIM_CHANNELS];\r
+} vimRAM_t;\r
+\r
+#define vimRAM ((vimRAM_t *)0xFFF82000U)\r
+\r
+#endif\r
--- /dev/null
+/*----------------------------------------------------------------------------*/\r
+/* sys_link.cmd */\r
+/* */\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Linker Settings */\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Memory Map */\r
+\r
+MEMORY\r
+{\r
+ VECTORS (X) : origin=0x00000000 length=0x00000020\r
+ FLASH0 (RX) : origin=0x00000020 length=0x0017FFE0\r
+ FLASH1 (RX) : origin=0x00180000 length=0x00180000\r
+ STACKS (RW) : origin=0x08000000 length=0x00000200\r
+ RAM (RW) : origin=0x08000200 length=0x0003FE00\r
+ }\r
+\r
+/*----------------------------------------------------------------------------*/\r
+/* Section Configuration */\r
+\r
+SECTIONS\r
+{\r
+ .intvecs : {} > VECTORS\r
+ .text : {} > FLASH0 | FLASH1\r
+ .const : {} > FLASH0 | FLASH1\r
+ .cinit : {} > FLASH0 | FLASH1\r
+ .pinit : {} > FLASH0 | FLASH1\r
+ .heap : {} > RAM\r
+ .bss : {} > RAM\r
+ .data : {} > RAM\r
+/* .sysmem : {} > RAM */\r
+}\r
+\r
+/*----------------------------------------------------------------------------*/\r
+\r
projects / freertos / commitdiff