# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
+extra-$(CONFIG_SPL_BUILD) := start.o
-LIB = $(obj)lib$(SOC).o
-
-COBJS = clock.o mxs.o iomux.o timer.o
+obj-y = clock.o mxs.o iomux.o timer.o
ifdef CONFIG_SPL_BUILD
-COBJS += spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
+obj-y += spl_boot.o spl_lradc_init.o spl_mem_init.o spl_power_init.o
endif
-SRCS := $(START:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-START := $(addprefix $(obj),$(START))
-
-all: $(obj).depend $(LIB)
-
-$(LIB): $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
# Specify the target for use in elftosb call
- ELFTOSB_TARGET-$(CONFIG_MX23) = imx23
- ELFTOSB_TARGET-$(CONFIG_MX28) = imx28
+ MKIMAGE_TARGET-$(CONFIG_MX23) = mx23
+ MKIMAGE_TARGET-$(CONFIG_MX28) = mx28
- $(OBJTREE)/u-boot.bd: $(SRCTREE)/$(CPUDIR)/$(SOC)/u-boot-$(ELFTOSB_TARGET-y).bd
+ $(OBJTREE)/mxsimage.cfg: $(SRCTREE)/$(CPUDIR)/$(SOC)/mxsimage.$(MKIMAGE_TARGET-y).cfg
sed "s@OBJTREE@$(OBJTREE)@g" $^ > $@
- $(OBJTREE)/u-boot.sb: $(OBJTREE)/u-boot.bin $(OBJTREE)/spl/u-boot-spl.bin $(OBJTREE)/u-boot.bd
- elftosb -zf $(ELFTOSB_TARGET-y) -c $(OBJTREE)/u-boot.bd -o $(OBJTREE)/u-boot.sb
+ $(OBJTREE)/u-boot.sb: $(OBJTREE)/u-boot.bin $(OBJTREE)/spl/u-boot-spl.bin $(OBJTREE)/mxsimage.cfg
+ $(OBJTREE)/tools/mkimage -n $(OBJTREE)/mxsimage.cfg -T mxsimage $@
-
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
# SPDX-License-Identifier: GPL-2.0+
#
- obj-$(CONFIG_DRIVER_OMAP34XX_I2C) += eeprom.o
- obj-$(CONFIG_LCD) += display.o
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := cm_t35.o leds.o $(COBJS-y)
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
--
-#########################################################################
+obj-y += cm_t35.o leds.o
--- /dev/null
-include $(TOPDIR)/config.mk
-
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)board/$(VENDOR)/common)
-endif
-
-LIB = $(obj)lib$(VENDOR).o
-
-COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += eeprom.o
-COBJS-$(CONFIG_LCD) += omap3_display.o
-
-COBJS := $(COBJS-y)
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-all: $(LIB)
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(call cmd_link_o_target, $(OBJS) $(SOBJS))
-
-#########################################################################
-# This is for $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+ #
+ # (C) Copyright 2011 - 2013 CompuLab, Ltd. <www.compulab.co.il>
+ #
+ # Author: Igor Grinberg <grinberg@compulab.co.il>
+ #
+ # SPDX-License-Identifier: GPL-2.0+
+ #
+
++obj-$(CONFIG_DRIVER_OMAP34XX_I2C) += eeprom.o
++obj-$(CONFIG_LCD) += omap3_display.o
# SPDX-License-Identifier: GPL-2.0+
#
- obj-y := tricorder.o
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := tricorder.o tricorder-eeprom.o led.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
++obj-y := tricorder.o tricorder-eeprom.o led.o
--- /dev/null
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
+ #
+ # (C) Copyright 2000-2006
+ # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ #
+ # SPDX-License-Identifier: GPL-2.0+
+ #
+
-COBJS := bg0900.o
+ ifndef CONFIG_SPL_BUILD
-COBJS := spl_boot.o
++obj-y := bg0900.o
+ else
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
++obj-y := spl_boot.o
+ endif
--- /dev/null
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).o
-
-COBJS := udoo.o
-
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
+ #
+ # (C) Copyright 2013 Freescale Semiconductor, Inc.
+ #
+ # SPDX-License-Identifier: GPL-2.0+
+ #
+
++obj-y := udoo.o
# SPDX-License-Identifier: GPL-2.0+
#
-include $(TOPDIR)/config.mk
-
-LIB := $(obj)libbootcount.o
-
-COBJS-y += bootcount.o
-COBJS-$(CONFIG_AT91SAM9XE) += bootcount_at91.o
-COBJS-$(CONFIG_BLACKFIN) += bootcount_blackfin.o
-COBJS-$(CONFIG_SOC_DA8XX) += bootcount_davinci.o
-COBJS-$(CONFIG_AM33XX) += bootcount_davinci.o
-COBJS-$(CONFIG_BOOTCOUNT_RAM) += bootcount_ram.o
-
-COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-
-$(LIB): $(obj).depend $(OBJS)
- $(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-########################################################################
+obj-y += bootcount.o
+obj-$(CONFIG_AT91SAM9XE) += bootcount_at91.o
+obj-$(CONFIG_BLACKFIN) += bootcount_blackfin.o
+obj-$(CONFIG_SOC_DA8XX) += bootcount_davinci.o
++obj-$(CONFIG_AM33XX) += bootcount_davinci.o
+obj-$(CONFIG_BOOTCOUNT_RAM) += bootcount_ram.o
--- /dev/null
-#define CONFIG_SYS_HZ 1000 /* 1ms clock */
+ /*
+ * Copyright (C) 2013, ISEE 2007 SL - http://www.isee.biz/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+ #ifndef __CONFIG_IGEP0033_H
+ #define __CONFIG_IGEP0033_H
+
+ #define CONFIG_AM33XX
+ #define CONFIG_OMAP
+ #define CONFIG_OMAP_COMMON
+
+ #include <asm/arch/omap.h>
+
+ /* Mach type */
+ #define MACH_TYPE_IGEP0033 4521 /* Until the next sync */
+ #define CONFIG_MACH_TYPE MACH_TYPE_IGEP0033
+
+ /* Clock defines */
+ #define V_OSCK 24000000 /* Clock output from T2 */
+ #define V_SCLK (V_OSCK)
+
+ #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
+ #define CONFIG_SYS_MALLOC_LEN (1024 << 10)
+ #define CONFIG_SYS_LONGHELP /* undef to save memory */
+ #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
+ #define CONFIG_SYS_PROMPT "U-Boot# "
+ #define CONFIG_SYS_NO_FLASH
+
+ /* Display cpuinfo */
+ #define CONFIG_DISPLAY_CPUINFO
+
+ /* Flattened Device Tree */
+ #define CONFIG_OF_LIBFDT
+
+ /* Commands to include */
+ #include <config_cmd_default.h>
+
+ #define CONFIG_CMD_ASKENV
+ #define CONFIG_CMD_BOOTZ
+ #define CONFIG_CMD_DHCP
+ #define CONFIG_CMD_ECHO
+ #define CONFIG_CMD_EXT4
+ #define CONFIG_CMD_FAT
+ #define CONFIG_CMD_FS_GENERIC
+ #define CONFIG_CMD_MMC
+ #define CONFIG_CMD_MTDPARTS
+ #define CONFIG_CMD_NAND
+ #define CONFIG_CMD_NET
+ #define CONFIG_CMD_PING
+ #define CONFIG_CMD_UBI
+ #define CONFIG_CMD_UBIFS
+
+ /* Make the verbose messages from UBI stop printing */
+ #define CONFIG_UBI_SILENCE_MSG
+ #define CONFIG_UBIFS_SILENCE_MSG
+
+ #define CONFIG_BOOTDELAY 1 /* negative for no autoboot */
+ #define CONFIG_ENV_VARS_UBOOT_CONFIG
+ #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+ #define CONFIG_EXTRA_ENV_SETTINGS \
+ "loadaddr=0x80F80000\0" \
+ "dtbaddr=0x80200000\0" \
+ "bootdir=/boot\0" \
+ "bootfile=zImage\0" \
+ "dtbfile=am335x-base0033.dtb\0" \
+ "console=ttyO0,115200n8\0" \
+ "mtdids=" MTDIDS_DEFAULT "\0" \
+ "mtdparts=" MTDPARTS_DEFAULT "\0" \
+ "mmcdev=0\0" \
+ "mmcroot=/dev/mmcblk0p2 rw\0" \
+ "ubiroot=ubi0:filesystem rw ubi.mtd=3,2048\0" \
+ "mmcrootfstype=ext4 rootwait\0" \
+ "ubirootfstype=ubifs rootwait\0" \
+ "mmcargs=setenv bootargs console=${console} " \
+ "root=${mmcroot} " \
+ "rootfstype=${mmcrootfstype}\0" \
+ "ubiargs=setenv bootargs console=${console} " \
+ "root=${ubiroot} " \
+ "rootfstype=${ubirootfstype}\0" \
+ "bootenv=uEnv.txt\0" \
+ "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
+ "importbootenv=echo Importing environment from mmc ...; " \
+ "env import -t ${loadaddr} ${filesize}\0" \
+ "mmcload=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}; " \
+ "load mmc ${mmcdev}:2 ${dtbaddr} ${bootdir}/${dtbfile}\0" \
+ "ubiload=ubi part filesystem 2048; ubifsmount ubi0; " \
+ "ubifsload ${loadaddr} ${bootdir}/${bootfile}; " \
+ "ubifsload ${dtbaddr} ${bootdir}/${dtbfile} \0" \
+ "mmcboot=echo Booting from mmc ...; " \
+ "run mmcargs; " \
+ "bootz ${loadaddr} - ${dtbaddr}\0" \
+ "ubiboot=echo Booting from nand (ubifs) ...; " \
+ "run ubiargs; run ubiload; " \
+ "bootz ${loadaddr} - ${dtbaddr}\0" \
+
+ #define CONFIG_BOOTCOMMAND \
+ "mmc dev ${mmcdev}; if mmc rescan; then " \
+ "echo SD/MMC found on device ${mmcdev};" \
+ "if run loadbootenv; then " \
+ "echo Loaded environment from ${bootenv};" \
+ "run importbootenv;" \
+ "fi;" \
+ "if test -n $uenvcmd; then " \
+ "echo Running uenvcmd ...;" \
+ "run uenvcmd;" \
+ "fi;" \
+ "if run mmcload; then " \
+ "run mmcboot;" \
+ "fi;" \
+ "else " \
+ "run ubiboot;" \
+ "fi;" \
+
+ /* Max number of command args */
+ #define CONFIG_SYS_MAXARGS 16
+
+ /* Console I/O Buffer Size */
+ #define CONFIG_SYS_CBSIZE 512
+
+ /* Print Buffer Size */
+ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
+ + sizeof(CONFIG_SYS_PROMPT) + 16)
+
+ /* Boot Argument Buffer Size */
+ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+ #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
+
+ /* Physical Memory Map */
+ #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
+ #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
+
+ #define CONFIG_SYS_SDRAM_BASE 0x80000000
+ #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
+ GENERATED_GBL_DATA_SIZE)
+ /* Platform/Board specific defs */
+ #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
+ #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
+
+ /* NS16550 Configuration */
+ #define CONFIG_SYS_NS16550
+ #define CONFIG_SYS_NS16550_SERIAL
+ #define CONFIG_SYS_NS16550_REG_SIZE (-4)
+ #define CONFIG_SYS_NS16550_CLK (48000000)
+ #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
+
+ #define CONFIG_CONS_INDEX 1
+ #define CONFIG_BAUDRATE 115200
+
+ /* CPU */
+ #define CONFIG_ARCH_CPU_INIT
+
+ #define CONFIG_ENV_OVERWRITE 1
+ #define CONFIG_SYS_CONSOLE_INFO_QUIET
+
+ /* MMC support */
+ #define CONFIG_MMC
+ #define CONFIG_GENERIC_MMC
+ #define CONFIG_OMAP_HSMMC
+ #define CONFIG_DOS_PARTITION
+
+ /* GPIO support */
+ #define CONFIG_OMAP_GPIO
+
+ /* Ethernet support */
+ #define CONFIG_DRIVER_TI_CPSW
+ #define CONFIG_MII
+ #define CONFIG_BOOTP_DNS
+ #define CONFIG_BOOTP_DNS2
+ #define CONFIG_BOOTP_SEND_HOSTNAME
+ #define CONFIG_BOOTP_GATEWAY
+ #define CONFIG_BOOTP_SUBNETMASK
+ #define CONFIG_NET_RETRY_COUNT 10
+ #define CONFIG_NET_MULTI
+ #define CONFIG_PHYLIB
+ #define CONFIG_PHY_ADDR 0
+ #define CONFIG_PHY_SMSC
+
+ /* NAND support */
+ #define CONFIG_NAND
+ #define CONFIG_NAND_OMAP_GPMC
+ #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
+ #define CONFIG_SYS_NAND_BASE (0x08000000) /* phys address CS0 */
+ #define CONFIG_SYS_MAX_NAND_DEVICE 1
+ #define CONFIG_SYS_NAND_ONFI_DETECTION 1
+ #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
+ #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+ #define CONFIG_ENV_IS_IN_NAND
+ #define CONFIG_ENV_OFFSET 0x180000 /* environment starts here */
+ #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_OFFSET + CONFIG_SYS_ENV_SECT_SIZE)
+ #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
+
+ #define CONFIG_MTD_PARTITIONS
+ #define CONFIG_MTD_DEVICE
+ #define CONFIG_RBTREE
+ #define CONFIG_LZO
+
+ #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
+ #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(spl),"\
+ "1m(uboot),256k(environment),"\
+ "-(filesystem)"
+
+ /* Unsupported features */
+ #undef CONFIG_USE_IRQ
+
+ /* Defines for SPL */
+ #define CONFIG_SPL
+ #define CONFIG_SPL_FRAMEWORK
+ /*
+ * Place the image at the start of the ROM defined image space.
+ * We limit our size to the ROM-defined downloaded image area, and use the
+ * rest of the space for stack.
+ */
+ #define CONFIG_SPL_TEXT_BASE 0x402F0400
+ #define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
+ #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
+
+ #define CONFIG_SPL_BSS_START_ADDR 0x80000000
+ #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
+
+ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
+ #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
+ #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
+ #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
+ #define CONFIG_SPL_MMC_SUPPORT
+ #define CONFIG_SPL_FAT_SUPPORT
+ #define CONFIG_SPL_LIBCOMMON_SUPPORT
+ #define CONFIG_SPL_LIBDISK_SUPPORT
+ #define CONFIG_SPL_LIBGENERIC_SUPPORT
+ #define CONFIG_SPL_SERIAL_SUPPORT
+ #define CONFIG_SPL_GPIO_SUPPORT
+ #define CONFIG_SPL_YMODEM_SUPPORT
+ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
+
+ #define CONFIG_SPL_BOARD_INIT
+ #define CONFIG_SPL_NAND_AM33XX_BCH
+ #define CONFIG_SPL_NAND_SUPPORT
+ #define CONFIG_SPL_NAND_BASE
+ #define CONFIG_SPL_NAND_DRIVERS
+ #define CONFIG_SPL_NAND_ECC
+ #define CONFIG_SYS_NAND_5_ADDR_CYCLE
+ #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
+ CONFIG_SYS_NAND_PAGE_SIZE)
+ #define CONFIG_SYS_NAND_PAGE_SIZE 2048
+ #define CONFIG_SYS_NAND_OOBSIZE 64
+ #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+ #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
+ #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
+ 10, 11, 12, 13, 14, 15, 16, 17, \
+ 18, 19, 20, 21, 22, 23, 24, 25, \
+ 26, 27, 28, 29, 30, 31, 32, 33, \
+ 34, 35, 36, 37, 38, 39, 40, 41, \
+ 42, 43, 44, 45, 46, 47, 48, 49, \
+ 50, 51, 52, 53, 54, 55, 56, 57, }
+
+ #define CONFIG_SYS_NAND_ECCSIZE 512
+ #define CONFIG_SYS_NAND_ECCBYTES 14
+
+ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+
+ #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+
+ /*
+ * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
+ * 64 bytes before this address should be set aside for u-boot.img's
+ * header. That is 0x800FFFC0--0x80100000 should not be used for any
+ * other needs.
+ */
+ #define CONFIG_SYS_TEXT_BASE 0x80800000
+ #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
+ #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
+
+ /*
+ * Since SPL did pll and ddr initialization for us,
+ * we don't need to do it twice.
+ */
+ #ifndef CONFIG_SPL_BUILD
+ #define CONFIG_SKIP_LOWLEVEL_INIT
+ #endif
+
+ #endif /* ! __CONFIG_IGEP0033_H */
--- /dev/null
-#define CONFIG_SYS_HZ 1000
+ /*
+ * Common configuration settings for IGEP technology based boards
+ *
+ * (C) Copyright 2012
+ * ISEE 2007 SL, <www.iseebcn.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+ #ifndef __IGEP00X0_H
+ #define __IGEP00X0_H
+
+ #include <asm/sizes.h>
+
+ /*
+ * High Level Configuration Options
+ */
+ #define CONFIG_OMAP 1 /* in a TI OMAP core */
+ #define CONFIG_OMAP34XX 1 /* which is a 34XX */
+ #define CONFIG_OMAP_GPIO
+ #define CONFIG_OMAP_COMMON
+
+ #define CONFIG_SDRC /* The chip has SDRC controller */
+
+ #include <asm/arch/cpu.h>
+ #include <asm/arch/omap3.h>
+ #include <asm/mach-types.h>
+
+ /*
+ * Display CPU and Board information
+ */
+ #define CONFIG_DISPLAY_CPUINFO 1
+ #define CONFIG_DISPLAY_BOARDINFO 1
+
+ /* Clock Defines */
+ #define V_OSCK 26000000 /* Clock output from T2 */
+ #define V_SCLK (V_OSCK >> 1)
+
+ #define CONFIG_MISC_INIT_R
+
+ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+ #define CONFIG_SETUP_MEMORY_TAGS 1
+ #define CONFIG_INITRD_TAG 1
+ #define CONFIG_REVISION_TAG 1
+
+ #define CONFIG_OF_LIBFDT
+ #define CONFIG_CMD_BOOTZ
+ #define CONFIG_SUPPORT_RAW_INITRD
+
+ /*
+ * NS16550 Configuration
+ */
+
+ #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
+
+ #define CONFIG_SYS_NS16550
+ #define CONFIG_SYS_NS16550_SERIAL
+ #define CONFIG_SYS_NS16550_REG_SIZE (-4)
+ #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
+
+ /* select serial console configuration */
+ #define CONFIG_CONS_INDEX 3
+ #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
+ #define CONFIG_SERIAL3 3
+
+ /* allow to overwrite serial and ethaddr */
+ #define CONFIG_ENV_OVERWRITE
+ #define CONFIG_BAUDRATE 115200
+ #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
+ 115200}
+ #define CONFIG_GENERIC_MMC 1
+ #define CONFIG_MMC 1
+ #define CONFIG_OMAP_HSMMC 1
+ #define CONFIG_DOS_PARTITION 1
+
+ /* define to enable boot progress via leds */
+ #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
+ (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
+ #define CONFIG_SHOW_BOOT_PROGRESS
+ #endif
+
+ /* USB */
+ #define CONFIG_MUSB_UDC 1
+ #define CONFIG_USB_OMAP3 1
+ #define CONFIG_TWL4030_USB 1
+
+ /* USB device configuration */
+ #define CONFIG_USB_DEVICE 1
+ #define CONFIG_USB_TTY 1
+ #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
+
+ /* Change these to suit your needs */
+ #define CONFIG_USBD_VENDORID 0x0451
+ #define CONFIG_USBD_PRODUCTID 0x5678
+ #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
+ #define CONFIG_USBD_PRODUCT_NAME "IGEP"
+
+ /* commands to include */
+ #include <config_cmd_default.h>
+
+ #define CONFIG_CMD_CACHE
+ #define CONFIG_CMD_EXT4
+ #define CONFIG_CMD_FAT /* FAT support */
+ #define CONFIG_CMD_FS_GENERIC
+ #define CONFIG_CMD_I2C /* I2C serial bus support */
+ #define CONFIG_CMD_MMC /* MMC support */
+ #ifdef CONFIG_BOOT_ONENAND
+ #define CONFIG_CMD_ONENAND /* ONENAND support */
+ #endif
+ #ifdef CONFIG_BOOT_NAND
+ #define CONFIG_CMD_NAND
+ #endif
+ #if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
+ (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
+ #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
+ #endif
+ #define CONFIG_CMD_DHCP
+ #define CONFIG_CMD_PING
+ #define CONFIG_CMD_NFS /* NFS support */
+ #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
+ #define CONFIG_MTD_DEVICE
+
+ #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
+ #undef CONFIG_CMD_IMLS /* List all found images */
+
+ #define CONFIG_SYS_NO_FLASH
+ #define CONFIG_HARD_I2C 1
+ #define CONFIG_SYS_I2C_SPEED 100000
+ #define CONFIG_SYS_I2C_SLAVE 1
+ #define CONFIG_DRIVER_OMAP34XX_I2C 1
+
+ /*
+ * TWL4030
+ */
+ #define CONFIG_TWL4030_POWER 1
+
+ #define CONFIG_BOOTDELAY 3
+
+ #define CONFIG_EXTRA_ENV_SETTINGS \
+ "usbtty=cdc_acm\0" \
+ "loadaddr=0x82000000\0" \
+ "dtbaddr=0x81600000\0" \
+ "bootdir=/boot\0" \
+ "bootfile=zImage\0" \
+ "usbtty=cdc_acm\0" \
+ "console=ttyO2,115200n8\0" \
+ "mpurate=auto\0" \
+ "vram=12M\0" \
+ "dvimode=1024x768MR-16@60\0" \
+ "defaultdisplay=dvi\0" \
+ "mmcdev=0\0" \
+ "mmcroot=/dev/mmcblk0p2 rw\0" \
+ "mmcrootfstype=ext4 rootwait\0" \
+ "nandroot=/dev/mtdblock4 rw\0" \
+ "nandrootfstype=jffs2\0" \
+ "mmcargs=setenv bootargs console=${console} " \
+ "mpurate=${mpurate} " \
+ "vram=${vram} " \
+ "omapfb.mode=dvi:${dvimode} " \
+ "omapfb.debug=y " \
+ "omapdss.def_disp=${defaultdisplay} " \
+ "root=${mmcroot} " \
+ "rootfstype=${mmcrootfstype}\0" \
+ "nandargs=setenv bootargs console=${console} " \
+ "mpurate=${mpurate} " \
+ "vram=${vram} " \
+ "omapfb.mode=dvi:${dvimode} " \
+ "omapfb.debug=y " \
+ "omapdss.def_disp=${defaultdisplay} " \
+ "root=${nandroot} " \
+ "rootfstype=${nandrootfstype}\0" \
+ "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
+ "importbootenv=echo Importing environment from mmc ...; " \
+ "env import -t $loadaddr $filesize\0" \
+ "loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \
+ "loadfdt=load mmc ${mmcdev}:2 ${dtbaddr} ${bootdir}/${dtbfile}\0" \
+ "mmcboot=echo Booting from mmc ...; " \
+ "run mmcargs; " \
+ "bootz ${loadaddr}\0" \
+ "mmcbootfdt=echo Booting with DT from mmc ...; " \
+ "bootz ${loadaddr} - ${dtbaddr}\0" \
+ "nandboot=echo Booting from onenand ...; " \
+ "run nandargs; " \
+ "onenand read ${loadaddr} 280000 400000; " \
+ "bootz ${loadaddr}\0" \
+
+ #define CONFIG_BOOTCOMMAND \
+ "mmc dev ${mmcdev}; if mmc rescan; then " \
+ "echo SD/MMC found on device ${mmcdev};" \
+ "if run loadbootenv; then " \
+ "run importbootenv;" \
+ "fi;" \
+ "if test -n $uenvcmd; then " \
+ "echo Running uenvcmd ...;" \
+ "run uenvcmd;" \
+ "fi;" \
+ "if run loadzimage; then " \
+ "if test -n $dtbfile; then " \
+ "if run loadfdt; then " \
+ "run mmcbootfdt;" \
+ "fi;" \
+ "fi;" \
+ "run mmcboot;" \
+ "fi;" \
+ "fi;" \
+ "run nandboot;" \
+
+ #define CONFIG_AUTO_COMPLETE 1
+
+ /*
+ * Miscellaneous configurable options
+ */
+ #define CONFIG_SYS_LONGHELP /* undef to save memory */
+ #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
+ #define CONFIG_SYS_PROMPT "U-Boot # "
+ #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+ /* Print Buffer Size */
+ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
+ sizeof(CONFIG_SYS_PROMPT) + 16)
+ #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+ /* Boot Argument Buffer Size */
+ #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
+
+ #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
+ /* works on */
+ #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
+ 0x01F00000) /* 31MB */
+
+ #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
+ /* load address */
+
+ #define CONFIG_SYS_MONITOR_LEN (256 << 10)
+
+ /*
+ * OMAP3 has 12 GP timers, they can be driven by the system clock
+ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
+ * This rate is divided by a local divisor.
+ */
+ #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
+ #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
+
+ /*
+ * Physical Memory Map
+ *
+ */
+ #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
+ #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
+ #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
+
+ /*
+ * FLASH and environment organization
+ */
+
+ #ifdef CONFIG_BOOT_ONENAND
+ #define PISMO1_ONEN_SIZE GPMC_SIZE_128M /* Configure the PISMO */
+
+ #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
+
+ #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
+
+ #define CONFIG_ENV_IS_IN_ONENAND 1
+ #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
+ #define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET
+ #endif
+
+ #ifdef CONFIG_BOOT_NAND
+ #define PISMO1_NAND_SIZE GPMC_SIZE_128M /* Configure the PISMO */
+ #define CONFIG_NAND_OMAP_GPMC
+ #define CONFIG_SYS_NAND_BASE NAND_BASE
+ #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
+ #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
+ #define CONFIG_ENV_IS_IN_NAND 1
+ #define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
+ #define CONFIG_ENV_ADDR NAND_ENV_OFFSET
+ #define CONFIG_SYS_MAX_NAND_DEVICE 1
+ #endif
+
+ /*
+ * Size of malloc() pool
+ */
+ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
+
+ /*
+ * SMSC911x Ethernet
+ */
+ #if defined(CONFIG_CMD_NET)
+ #define CONFIG_SMC911X
+ #define CONFIG_SMC911X_32_BIT
+ #define CONFIG_SMC911X_BASE 0x2C000000
+ #endif /* (CONFIG_CMD_NET) */
+
+ /*
+ * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
+ * and older u-boot.bin with the new U-Boot SPL.
+ */
+ #define CONFIG_SYS_TEXT_BASE 0x80008000
+ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+ #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
+ #define CONFIG_SYS_INIT_RAM_SIZE 0x800
+ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
+ CONFIG_SYS_INIT_RAM_SIZE - \
+ GENERATED_GBL_DATA_SIZE)
+
+ /* SPL */
+ #define CONFIG_SPL
+ #define CONFIG_SPL_FRAMEWORK
+ #define CONFIG_SPL_NAND_SIMPLE
+ #define CONFIG_SPL_TEXT_BASE 0x40200800
+ #define CONFIG_SPL_MAX_SIZE (54 * 1024)
+ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
+
+ /* move malloc and bss high to prevent clashing with the main image */
+ #define CONFIG_SYS_SPL_MALLOC_START 0x87000000
+ #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
+ #define CONFIG_SPL_BSS_START_ADDR 0x87080000 /* end of minimum RAM */
+ #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
+
+ /* MMC boot config */
+ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
+ #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
+ #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
+ #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
+
+ #define CONFIG_SPL_BOARD_INIT
+ #define CONFIG_SPL_LIBCOMMON_SUPPORT
+ #define CONFIG_SPL_LIBDISK_SUPPORT
+ #define CONFIG_SPL_I2C_SUPPORT
+ #define CONFIG_SPL_LIBGENERIC_SUPPORT
+ #define CONFIG_SPL_MMC_SUPPORT
+ #define CONFIG_SPL_FAT_SUPPORT
+ #define CONFIG_SPL_SERIAL_SUPPORT
+
+ #define CONFIG_SPL_POWER_SUPPORT
+ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+ #ifdef CONFIG_BOOT_ONENAND
+ #define CONFIG_SPL_ONENAND_SUPPORT
+
+ /* OneNAND boot config */
+ #define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000
+ #define CONFIG_SYS_ONENAND_PAGE_SIZE 2048
+ #define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000
+ #define CONFIG_SPL_ONENAND_LOAD_SIZE \
+ (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
+
+ #endif
+
+ #ifdef CONFIG_BOOT_NAND
+ #define CONFIG_SPL_NAND_SUPPORT
+ #define CONFIG_SPL_NAND_BASE
+ #define CONFIG_SPL_NAND_DRIVERS
+ #define CONFIG_SPL_NAND_ECC
+
+ /* NAND boot config */
+ #define CONFIG_SYS_NAND_5_ADDR_CYCLE
+ #define CONFIG_SYS_NAND_PAGE_COUNT 64
+ #define CONFIG_SYS_NAND_PAGE_SIZE 2048
+ #define CONFIG_SYS_NAND_OOBSIZE 64
+ #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+ #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
+ #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
+ 10, 11, 12, 13}
+ #define CONFIG_SYS_NAND_ECCSIZE 512
+ #define CONFIG_SYS_NAND_ECCBYTES 3
+ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+ #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+ #endif
+
+ #endif /* __IGEP00X0_H */
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