]> git.sur5r.net Git - u-boot/commitdiff
dm: ls1021a: dts: Add QSPI dts node
authorHaikun.Wang@freescale.com <Haikun.Wang@freescale.com>
Tue, 24 Mar 2015 13:20:40 +0000 (21:20 +0800)
committerSimon Glass <sjg@chromium.org>
Sat, 18 Apr 2015 17:11:18 +0000 (11:11 -0600)
Add QSPI controller dts node in ls1021a.dtsi.
Add QSPI slave device dts node in ls1021a-twr.dts and ls1021a-qds.dts.

Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/arm/dts/ls1021a-qds.dts
arch/arm/dts/ls1021a-twr.dts
arch/arm/dts/ls1021a.dtsi

index 8971c18e2a2a83928cb250839bba0ddcd50a9702..836781153d804b422cb9d9fff93ba043e97f1b9f 100644 (file)
@@ -18,6 +18,7 @@
                enet2_rgmii_phy = &rgmii_phy3;
                enet0_sgmii_phy = &sgmii_phy1c;
                enet1_sgmii_phy = &sgmii_phy1d;
+               spi0 = &qspi;
                spi1 = &dspi0;
        };
 };
        };
 };
 
+&qspi {
+       bus-num = <0>;
+       status = "okay";
+
+       qflash0: s25fl128s@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <20000000>;
+               reg = <0>;
+       };
+};
+
 &i2c0 {
        status = "okay";
 
index 3d9f23bf1170eab1ddf46b73933a21cbac6240ea..0e61c07c5a6e598b24f8e43dbfef500a1b3c48c1 100644 (file)
                enet2_rgmii_phy = &rgmii_phy1;
                enet0_sgmii_phy = &sgmii_phy2;
                enet1_sgmii_phy = &sgmii_phy0;
+               spi0 = &qspi;
+       };
+};
+
+&qspi {
+       bus-num = <0>;
+       status = "okay";
+
+       qflash0: n25q128a13@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spi-flash";
+               spi-max-frequency = <20000000>;
+               reg = <0>;
        };
 };
 
index 8b3c55776df19327ae80422ec7dcd8977c2525a1..7fadd7ca57a7d57b24a119987051fb5860627d14 100644 (file)
                        status = "disabled";
                };
 
+               qspi: quadspi@1550000 {
+                       compatible = "fsl,vf610-qspi";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x1550000 0x10000>,
+                               <0x40000000 0x4000000>;
+                       num-cs = <2>;
+                       big-endian;
+                       status = "disabled";
+               };
+
                i2c0: i2c@2180000 {
                        compatible = "fsl,vf610-i2c";
                        #address-cells = <1>;