arm: mxs: Fix vectoring table crafting

The vectoring table has to be placed at 0x0, but U-Boot on MX23/MX28
starts from RAM, so the vectoring table at 0x0 is not present. Craft
code that will be placed at 0x0 and will redirect interrupt vectoring
to proper location of the U-Boot in RAM.

Signed-off-by: Marek Vasut <marex@denx.de>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>

diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index a5e388b5add4d6c02beb83ef1e602edf55c61c4e..45667bd8fb5fc9caba596560d6dfffa90d5dfa82 100644 (file)
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -76,13 +76,32 @@ void enable_caches(void)
 #endif
 }
 
+/*
+ * This function will craft a jumptable at 0x0 which will redirect interrupt
+ * vectoring to proper location of U-Boot in RAM.
+ *
+ * The structure of the jumptable will be as follows:
+ *  ldr pc, [pc, #0x18] ..... for each vector, thus repeated 8 times
+ *  <destination address> ... for each previous ldr, thus also repeated 8 times
+ *
+ * The "ldr pc, [pc, #0x18]" instruction above loads address from memory at
+ * offset 0x18 from current value of PC register. Note that PC is already
+ * incremented by 4 when computing the offset, so the effective offset is
+ * actually 0x20, this the associated <destination address>. Loading the PC
+ * register with an address performs a jump to that address.
+ */
 void mx28_fixup_vt(uint32_t start_addr)
 {
-       uint32_t *vt = (uint32_t *)0x20;
+       /* ldr pc, [pc, #0x18] */
+       const uint32_t ldr_pc = 0xe59ff018;
+       /* Jumptable location is 0x0 */
+       uint32_t *vt = (uint32_t *)0x0;
        int i;
 
-       for (i = 0; i < 8; i++)
-               vt[i] = start_addr + (4 * i);
+       for (i = 0; i < 8; i++) {
+               vt[i] = ldr_pc;
+               vt[i + 8] = start_addr + (4 * i);
+       }
 }
 
 #ifdef CONFIG_ARCH_MISC_INIT