static int32_t e1000_phy_hw_reset(struct e1000_hw *hw);
 static int e1000_phy_reset(struct e1000_hw *hw);
 static int e1000_detect_gig_phy(struct e1000_hw *hw);
-static void e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw);
 static void e1000_set_media_type(struct e1000_hw *hw);
 
 static int32_t e1000_swfw_sync_acquire(struct e1000_hw *hw, uint16_t mask);
 static int32_t e1000_check_phy_reset_block(struct e1000_hw *hw);
 
+#ifndef CONFIG_E1000_NO_NVM
+static void e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw);
 static int32_t e1000_read_eeprom(struct e1000_hw *hw, uint16_t offset,
                uint16_t words,
                uint16_t *data);
 
        return -E1000_ERR_EEPROM;
 }
+#endif /* CONFIG_E1000_NO_NVM */
 
 /*****************************************************************************
  * Set PHY to class A mode
 static int32_t
 e1000_set_phy_mode(struct e1000_hw *hw)
 {
+#ifndef CONFIG_E1000_NO_NVM
        int32_t ret_val;
        uint16_t eeprom_data;
 
                        hw->phy_reset_disable = false;
                }
        }
-
+#endif
        return E1000_SUCCESS;
 }
 
+#ifndef CONFIG_E1000_NO_NVM
 /***************************************************************************
  *
  * Obtaining software semaphore bit (SMBI) before resetting PHY.
 
        return E1000_SUCCESS;
 }
+#endif
 
 /***************************************************************************
  * This function clears HW semaphore bits.
 static void
 e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw)
 {
+#ifndef CONFIG_E1000_NO_NVM
         uint32_t swsm;
 
        DEBUGFUNC();
        } else
                swsm &= ~(E1000_SWSM_SWESMBI);
        E1000_WRITE_REG(hw, SWSM, swsm);
+#endif
 }
 
 /***************************************************************************
 static int32_t
 e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw)
 {
+#ifndef CONFIG_E1000_NO_NVM
        int32_t timeout;
        uint32_t swsm;
 
                                "SWESMBI bit is set.\n");
                return -E1000_ERR_EEPROM;
        }
-
+#endif
        return E1000_SUCCESS;
 }
 
        }
 }
 
+#ifndef CONFIG_E1000_NO_NVM
 /******************************************************************************
  * Reads the adapter's MAC address from the EEPROM and inverts the LSB for the
  * second function of dual function devices
 #endif
        return 0;
 }
+#endif
 
 /******************************************************************************
  * Initializes receive address filters.
 e1000_setup_link(struct eth_device *nic)
 {
        struct e1000_hw *hw = nic->priv;
-       uint32_t ctrl_ext;
        int32_t ret_val;
+#ifndef CONFIG_E1000_NO_NVM
+       uint32_t ctrl_ext;
        uint16_t eeprom_data;
+#endif
 
        DEBUGFUNC();
 
        if (e1000_check_phy_reset_block(hw))
                return E1000_SUCCESS;
 
+#ifndef CONFIG_E1000_NO_NVM
        /* Read and store word 0x0F of the EEPROM. This word contains bits
         * that determine the hardware's default PAUSE (flow control) mode,
         * a bit that determines whether the HW defaults to enabling or
                DEBUGOUT("EEPROM Read Error\n");
                return -E1000_ERR_EEPROM;
        }
-
+#endif
        if (hw->fc == e1000_fc_default) {
                switch (hw->mac_type) {
                case e1000_ich8lan:
                        hw->fc = e1000_fc_full;
                        break;
                default:
+#ifndef CONFIG_E1000_NO_NVM
                        ret_val = e1000_read_eeprom(hw,
                                EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
                        if (ret_val) {
                                    EEPROM_WORD0F_ASM_DIR)
                                hw->fc = e1000_fc_tx_pause;
                        else
+#endif
                                hw->fc = e1000_fc_full;
                        break;
                }
 
        DEBUGOUT("After fix-ups FlowControl is now = %x\n", hw->fc);
 
+#ifndef CONFIG_E1000_NO_NVM
        /* Take the 4 bits from EEPROM word 0x0F that determine the initial
         * polarity value for the SW controlled pins, and setup the
         * Extended Device Control reg with that info.
                            SWDPIO__EXT_SHIFT);
                E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
        }
+#endif
 
        /* Call the necessary subroutine to configure the link. */
        ret_val = (hw->media_type == e1000_media_type_fiber) ?
                e1000_reset_hw(hw);
                list_add_tail(&hw->list_node, &e1000_hw_list);
 
+#ifndef CONFIG_E1000_NO_NVM
                /* Validate the EEPROM and get chipset information */
 #if !defined(CONFIG_MVBC_1G)
                if (e1000_init_eeprom_params(hw)) {
                        continue;
 #endif
                e1000_read_mac_addr(nic);
+#endif
                e1000_get_bus_type(hw);
 
+#ifndef CONFIG_E1000_NO_NVM
                printf("e1000: %02x:%02x:%02x:%02x:%02x:%02x\n       ",
                       nic->enetaddr[0], nic->enetaddr[1], nic->enetaddr[2],
                       nic->enetaddr[3], nic->enetaddr[4], nic->enetaddr[5]);
+#else
+               memset(nic->enetaddr, 0, 6);
+               printf("e1000: no NVM\n");
+#endif
 
                /* Set up the function pointers and register the device */
                nic->init = e1000_init;
 
 
 /* Internal E1000 helper functions */
 struct e1000_hw *e1000_find_card(unsigned int cardnum);
+
+#ifndef CONFIG_E1000_NO_NVM
 int32_t e1000_acquire_eeprom(struct e1000_hw *hw);
 void e1000_standby_eeprom(struct e1000_hw *hw);
 void e1000_release_eeprom(struct e1000_hw *hw);
 void e1000_raise_ee_clk(struct e1000_hw *hw, uint32_t *eecd);
 void e1000_lower_ee_clk(struct e1000_hw *hw, uint32_t *eecd);
+#endif
 
 #ifdef CONFIG_E1000_SPI
 int do_e1000_spi(cmd_tbl_t *cmdtp, struct e1000_hw *hw,
        uint64_t tsctfc;
 };
 
+#ifndef CONFIG_E1000_NO_NVM
 struct e1000_eeprom_info {
 e1000_eeprom_type type;
        uint16_t word_size;
        bool use_eerd;
        bool use_eewr;
 };
+#endif
 
 typedef enum {
     e1000_smart_speed_default = 0,
        uint32_t io_base;
 #endif
        uint32_t                asf_firmware_present;
+#ifndef CONFIG_E1000_NO_NVM
        uint32_t                eeprom_semaphore_present;
+#endif
        uint32_t                swfw_sync_present;
        uint32_t                swfwhw_semaphore_present;
+#ifndef CONFIG_E1000_NO_NVM
        struct e1000_eeprom_info eeprom;
+#endif
        e1000_ms_type           master_slave;
        e1000_ms_type           original_master_slave;
        e1000_ffe_config        ffe_config_state;