]> git.sur5r.net Git - u-boot/commitdiff
Coding style cleanup; update CHANEGLOG
authorWolfgang Denk <wd@denx.de>
Wed, 17 Sep 2008 08:17:55 +0000 (10:17 +0200)
committerWolfgang Denk <wd@denx.de>
Wed, 17 Sep 2008 08:17:55 +0000 (10:17 +0200)
Signed-off-by: Wolfgang Denk <wd@denx.de>
CHANGELOG
board/tqc/tqm8xx/tqm8xx.c

index 9a117a627612d0928cbefffbacd210432754c84c..85dc920f2b8089b207247d4e62756f0c6961854b 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,3 +1,33 @@
+commit 7c803be2eb3cae245dedda438776e08fb122250f
+Author: Wolfgang Denk <wd@denx.de>
+Date:  Tue Sep 16 18:02:19 2008 +0200
+
+    TQM8xx: Fix CFI flash driver support for all TQM8xx based boards
+
+    After switching to using the CFI flash driver, the correct remapping
+    of the flash banks was forgotten.
+
+    Also, some boards were not adapted, and the old legacy flash driver
+    was not removed yet.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c0d2f87d6c450128b88e73eea715fa3654f65b6c
+Author: Wolfgang Denk <wd@denx.de>
+Date:  Sun Sep 14 00:59:35 2008 +0200
+
+    Prepare v2008.10-rc2
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit f12e4549b6fb01cd2654348af95a3c7a6ac161e7
+Author: Wolfgang Denk <wd@denx.de>
+Date:  Sat Sep 13 02:23:05 2008 +0200
+
+    Coding style cleanup, update CHANGELOG
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
 commit 0c32565f536609d78feef35c88bbc39d3ac53a73
 Author: Peter Tyser <ptyser@xes-inc.com>
 Date:  Wed Sep 10 09:18:34 2008 -0500
index 59bbdbc43b447011a4c69b7fac8111fac0d5cbed..5537d044a57c9e8b185b0de581d54106b783888c 100644 (file)
@@ -400,8 +400,6 @@ phys_size_t initdram (int board_type)
        memctl->memc_or5 = CFG_OR5_ISP1362;
        memctl->memc_br5 = CFG_BR5_ISP1362;
 #endif                                                 /* CONFIG_ISP1362_USB */
-
-
        return (size_b0 + size_b1);
 }
 
@@ -453,7 +451,7 @@ int board_early_init_r (void)
 #ifdef CONFIG_MISC_INIT_R
 int misc_init_r (void)
 {
-       volatile immap_t     *immap  = (immap_t *)CFG_IMMR;
+       volatile immap_t *immap = (immap_t *) CFG_IMMR;
        volatile memctl8xx_t *memctl = &immap->im_memctl;
 
 #ifdef CFG_OR_TIMING_FLASH_AT_50MHZ
@@ -463,28 +461,29 @@ int misc_init_r (void)
        if (CFG_OR_TIMING_FLASH_AT_50MHZ & OR_TRLX) {
                trlx = OR_TRLX;
                scy *= 2;
-       } else
+       } else {
                trlx = 0;
+       }
 
-               /*
-                * We assume that each 10MHz of bus clock require 1-clk SCY
-                * adjustment.
-                */
+       /*
+        * We assume that each 10MHz of bus clock require 1-clk SCY
+        * adjustment.
+        */
        clk_diff = (gd->bus_clk / 1000000) - 50;
 
-               /*
-                * We need proper rounding here. This is what the "+5" and "-5"
-                * are here for.
-                */
+       /*
+        * We need proper rounding here. This is what the "+5" and "-5"
+        * are here for.
+        */
        if (clk_diff >= 0)
                scy += (clk_diff + 5) / 10;
        else
                scy += (clk_diff - 5) / 10;
 
-               /*
-                * For bus frequencies above 50MHz, we want to use relaxed timing
-                * (OR_TRLX).
-                */
+       /*
+        * For bus frequencies above 50MHz, we want to use relaxed timing
+        * (OR_TRLX).
+        */
        if (gd->bus_clk >= 50000000)
                trlx = OR_TRLX;
        else
@@ -499,35 +498,39 @@ int misc_init_r (void)
                scy = 1;
 
        flash_or_timing = (scy << 4) | trlx |
-                         (CFG_OR_TIMING_FLASH_AT_50MHZ & ~(OR_TRLX | OR_SCY_MSK));
+               (CFG_OR_TIMING_FLASH_AT_50MHZ & ~(OR_TRLX | OR_SCY_MSK));
 
-       memctl->memc_or0 = flash_or_timing | (-flash_info[0].size & OR_AM_MSK);
+       memctl->memc_or0 =
+               flash_or_timing | (-flash_info[0].size & OR_AM_MSK);
 #else
-       memctl->memc_or0 = CFG_OR_TIMING_FLASH | (-flash_info[0].size & OR_AM_MSK);
+       memctl->memc_or0 =
+               CFG_OR_TIMING_FLASH | (-flash_info[0].size & OR_AM_MSK);
 #endif
        memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V;
 
        debug ("## BR0: 0x%08x    OR0: 0x%08x\n",
-               memctl->memc_br0, memctl->memc_or0);
+              memctl->memc_br0, memctl->memc_or0);
 
        if (flash_info[1].size) {
 #ifdef CFG_OR_TIMING_FLASH_AT_50MHZ
                memctl->memc_or1 = flash_or_timing |
-                                  (-flash_info[1].size & 0xFFFF8000);
+                       (-flash_info[1].size & 0xFFFF8000);
 #else
                memctl->memc_or1 = CFG_OR_TIMING_FLASH |
-                                  (-flash_info[1].size & 0xFFFF8000);
+                       (-flash_info[1].size & 0xFFFF8000);
 #endif
-               memctl->memc_br1 = ((CFG_FLASH_BASE + flash_info[0].size) & BR_BA_MSK) |
-                                   BR_MS_GPCM | BR_V;
+               memctl->memc_br1 =
+                       ((CFG_FLASH_BASE +
+                         flash_info[0].
+                         size) & BR_BA_MSK) | BR_MS_GPCM | BR_V;
 
                debug ("## BR1: 0x%08x    OR1: 0x%08x\n",
-                       memctl->memc_br1, memctl->memc_or1);
+                      memctl->memc_br1, memctl->memc_or1);
        } else {
-               memctl->memc_br1 = 0;           /* invalidate bank */
+               memctl->memc_br1 = 0;   /* invalidate bank */
 
                debug ("## DISABLE BR1: 0x%08x    OR1: 0x%08x\n",
-                       memctl->memc_br1, memctl->memc_or1);
+                      memctl->memc_br1, memctl->memc_or1);
        }
 
 # ifdef CONFIG_IDE_LED
@@ -540,11 +543,11 @@ int misc_init_r (void)
 
 #ifdef CONFIG_NSCU
        /* wake up ethernet module */
-       immap->im_ioport.iop_pcpar &= ~0x0004; /* GPIO pin      */
-       immap->im_ioport.iop_pcdir |=  0x0004; /* output        */
-       immap->im_ioport.iop_pcso  &= ~0x0004; /* for clarity   */
-       immap->im_ioport.iop_pcdat |=  0x0004; /* enable        */
-#endif /* CONFIG_NSCU */
+       immap->im_ioport.iop_pcpar &= ~0x0004;  /* GPIO pin      */
+       immap->im_ioport.iop_pcdir |= 0x0004;   /* output        */
+       immap->im_ioport.iop_pcso &= ~0x0004;   /* for clarity   */
+       immap->im_ioport.iop_pcdat |= 0x0004;   /* enable        */
+#endif /* CONFIG_NSCU */
 
        return (0);
 }
@@ -609,7 +612,4 @@ int last_stage_init(void)
 
        return 0;
 }
-
 #endif
-
-/* ------------------------------------------------------------------------- */