]> git.sur5r.net Git - u-boot/commitdiff
Add "chip_config" command for PPC4xx bootstrap configuration
authorStefan Roese <sr@denx.de>
Mon, 20 Jul 2009 04:57:27 +0000 (06:57 +0200)
committerStefan Roese <sr@denx.de>
Fri, 24 Jul 2009 04:42:32 +0000 (06:42 +0200)
This patch adds a generic command for programming I2C bootstrap
eeproms on PPC4xx. An implementation for Canyonlands board is
included.

The command name is intentionally chosen not to be PPC4xx specific.
This way other CPU's/SoC's can implement a similar command under
the same name, perhaps with a different syntax.

Usage on Canyonlands:

=> chip_config
Available configurations (I2C address 0x52):
600-nor          - NOR  CPU: 600 PLB: 200 OPB: 100 EBC: 100
600-nand         - NAND CPU: 600 PLB: 200 OPB: 100 EBC: 100
800-nor          - NOR  CPU: 800 PLB: 200 OPB: 100 EBC: 100
800-nand         - NAND CPU: 800 PLB: 200 OPB: 100 EBC: 100
1000-nor         - NOR  CPU:1000 PLB: 200 OPB: 100 EBC: 100
1000-nand        - NAND CPU:1000 PLB: 200 OPB: 100 EBC: 100
1066-nor         - NOR  CPU:1066 PLB: 266 OPB:  88 EBC:  88 ***
1066-nand        - NAND CPU:1066 PLB: 266 OPB:  88 EBC:  88
=> chip_config 600-nor
Using configuration:
600-nor          - NOR  CPU: 600 PLB: 200 OPB: 100 EBC: 100
done (dump via 'i2c md 52 0.1 10')
Reset the board for the changes to take effect

Other 4xx boards will be migrated to use this command soon
as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
board/amcc/canyonlands/Makefile
board/amcc/canyonlands/bootstrap.c [deleted file]
board/amcc/canyonlands/chip_config.c [new file with mode: 0644]
cpu/ppc4xx/Makefile
cpu/ppc4xx/cmd_chip_config.c [new file with mode: 0644]
include/asm-ppc/ppc4xx_config.h [new file with mode: 0644]
include/configs/canyonlands.h

index 2aeead60f915d20a98bb36d20e2a079a546ace33..12f8a642e70490726d2d175f476e15134ab8a812 100644 (file)
@@ -25,10 +25,11 @@ include $(TOPDIR)/config.mk
 
 LIB    = $(obj)lib$(BOARD).a
 
-COBJS  := $(BOARD).o
-COBJS  += bootstrap.o
+COBJS-y        := $(BOARD).o
+COBJS-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
 SOBJS  := init.o
 
+COBJS   := $(COBJS-y)
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS   := $(addprefix $(obj),$(COBJS))
 SOBJS  := $(addprefix $(obj),$(SOBJS))
diff --git a/board/amcc/canyonlands/bootstrap.c b/board/amcc/canyonlands/bootstrap.c
deleted file mode 100644 (file)
index 6dc2cca..0000000
+++ /dev/null
@@ -1,195 +0,0 @@
-/*
- * (C) Copyright 2008
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h>
-#include <command.h>
-#include <i2c.h>
-#include <asm/io.h>
-
-/*
- * NOR and NAND boot options change bytes 5, 6, 8, 9, 11. The
- * values are independent of the rest of the clock settings.
- */
-
-#define NAND_COMPATIBLE        0x01
-#define NOR_COMPATIBLE  0x02
-
-#define I2C_EEPROM_ADDR 0x52
-
-static char *config_labels[] = {
-       "CPU: 600 PLB: 200 OPB: 100 EBC: 100",
-       "CPU: 800 PLB: 200 OPB: 100 EBC: 100",
-       "CPU:1000 PLB: 200 OPB: 100 EBC: 100",
-       "CPU:1066 PLB: 266 OPB:  88 EBC:  88",
-       NULL
-};
-
-static u8 boot_configs[][17] = {
-       {
-               (NAND_COMPATIBLE | NOR_COMPATIBLE),
-               0x86, 0x80, 0xce, 0x1f, 0x79, 0x80, 0x00, 0xa0, 0x40, 0x08,
-               0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
-       },
-       {
-               (NAND_COMPATIBLE | NOR_COMPATIBLE),
-               0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0, 0x40, 0x08,
-               0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
-       },
-       {
-               (NAND_COMPATIBLE | NOR_COMPATIBLE),
-               0x86, 0x82, 0x96, 0x19, 0xb9, 0x80, 0x00, 0xa0, 0x40, 0x08,
-               0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
-       },
-       {
-               (NAND_COMPATIBLE | NOR_COMPATIBLE),
-               0x86, 0x80, 0xb3, 0x01, 0x9d, 0x80, 0x00, 0xa0, 0x40, 0x08,
-               0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
-       },
-       {
-               0,
-               0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
-       }
-};
-
-/*
- * Bytes 5,6,8,9,11 change for NAND boot
- */
-#if 0
-/*
- * Values for 512 page size NAND chips, not used anymore, just
- * keep them here for reference
- */
-static u8 nand_boot[] = {
-       0x90, 0x01,  0xa0, 0x68, 0x58
-};
-#else
-/*
- * Values for 2k page size NAND chips
- */
-static u8 nand_boot[] = {
-       0x90, 0x01,  0xa0, 0xe8, 0x58
-};
-#endif
-
-static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
-       u8 *buf, b_nand;
-       int x, y, nbytes, selcfg;
-       extern char console_buffer[];
-
-       if (argc < 2) {
-               cmd_usage(cmdtp);
-               return 1;
-       }
-
-       if ((strcmp(argv[1], "nor") != 0) &&
-           (strcmp(argv[1], "nand") != 0)) {
-               printf("Unsupported boot-device - only nor|nand support\n");
-               return 1;
-       }
-
-       /* set the nand flag based on provided input */
-       if ((strcmp(argv[1], "nand") == 0))
-               b_nand = 1;
-       else
-               b_nand = 0;
-
-       printf("Available configurations: \n\n");
-
-       if (b_nand) {
-               for(x = 0, y = 0; boot_configs[x][0] != 0; x++) {
-                       /* filter on nand compatible */
-                       if (boot_configs[x][0] & NAND_COMPATIBLE) {
-                               printf(" %d - %s\n", (y+1), config_labels[x]);
-                               y++;
-                       }
-               }
-       } else {
-               for(x = 0, y = 0; boot_configs[x][0] != 0; x++) {
-                       /* filter on nor compatible */
-                       if (boot_configs[x][0] & NOR_COMPATIBLE) {
-                               printf(" %d - %s\n", (y+1), config_labels[x]);
-                               y++;
-                       }
-               }
-       }
-
-       do {
-               nbytes = readline(" Selection [1-x / quit]: ");
-
-               if (nbytes) {
-                       if (strcmp(console_buffer, "quit") == 0)
-                               return 0;
-                       selcfg = simple_strtol(console_buffer, NULL, 10);
-                       if ((selcfg < 1) || (selcfg > y))
-                               nbytes = 0;
-               }
-       } while (nbytes == 0);
-
-
-       y = (selcfg - 1);
-
-       for (x = 0; boot_configs[x][0] != 0; x++) {
-               if (b_nand) {
-                       if (boot_configs[x][0] & NAND_COMPATIBLE) {
-                               if (y > 0)
-                                       y--;
-                               else if (y < 1)
-                                       break;
-                       }
-               } else {
-                       if (boot_configs[x][0] & NOR_COMPATIBLE) {
-                               if (y > 0)
-                                       y--;
-                               else if (y < 1)
-                                       break;
-                       }
-               }
-       }
-
-       buf = &boot_configs[x][1];
-
-       if (b_nand) {
-               buf[5] = nand_boot[0];
-               buf[6] = nand_boot[1];
-               buf[8] = nand_boot[2];
-               buf[9] = nand_boot[3];
-               buf[11] = nand_boot[4];
-       }
-
-       if (i2c_write(I2C_EEPROM_ADDR, 0, 1, buf, 16) != 0)
-               printf("Error writing to EEPROM at address 0x%x\n", I2C_EEPROM_ADDR);
-       udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
-
-       printf("Done\n");
-       printf("Please power-cycle the board for the changes to take effect\n");
-
-       return 0;
-}
-
-U_BOOT_CMD(
-       bootstrap,      2,      0,      do_bootstrap,
-       "program the I2C bootstrap EEPROM",
-       "<nand|nor> - strap to boot from NAND or NOR flash"
-);
diff --git a/board/amcc/canyonlands/chip_config.c b/board/amcc/canyonlands/chip_config.c
new file mode 100644 (file)
index 0000000..e46f4d8
--- /dev/null
@@ -0,0 +1,87 @@
+/*
+ * (C) Copyright 2008-2009
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <asm/ppc4xx_config.h>
+
+struct ppc4xx_config ppc4xx_config_val[] = {
+       {
+               "600-nor", "NOR  CPU: 600 PLB: 200 OPB: 100 EBC: 100",
+               {
+                       0x86, 0x80, 0xce, 0x1f, 0x79, 0x80, 0x00, 0xa0,
+                       0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+               }
+       },
+       {
+               "600-nand", "NAND CPU: 600 PLB: 200 OPB: 100 EBC: 100",
+               {
+                       0x86, 0x80, 0xce, 0x1f, 0x79, 0x90, 0x01, 0xa0,
+                       0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
+               }
+       },
+       {
+               "800-nor", "NOR  CPU: 800 PLB: 200 OPB: 100 EBC: 100",
+               {
+                       0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0,
+                       0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+               }
+       },
+       {
+               "800-nand", "NAND CPU: 800 PLB: 200 OPB: 100 EBC: 100",
+               {
+                       0x86, 0x80, 0xba, 0x14, 0x99, 0x90, 0x01, 0xa0,
+                       0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
+               }
+       },
+       {
+               "1000-nor", "NOR  CPU:1000 PLB: 200 OPB: 100 EBC: 100",
+               {
+                       0x86, 0x82, 0x96, 0x19, 0xb9, 0x80, 0x00, 0xa0,
+                       0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+               }
+       },
+       {
+               "1000-nand", "NAND CPU:1000 PLB: 200 OPB: 100 EBC: 100",
+               {
+                       0x86, 0x82, 0x96, 0x19, 0xb9, 0x90, 0x01, 0xa0,
+                       0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
+               }
+       },
+       {
+               "1066-nor", "NOR  CPU:1066 PLB: 266 OPB:  88 EBC:  88",
+               {
+                       0x86, 0x80, 0xb3, 0x01, 0x9d, 0x80, 0x00, 0xa0,
+                       0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+               }
+       },
+       {
+               "1066-nand", "NAND CPU:1066 PLB: 266 OPB:  88 EBC:  88",
+               {
+                       0x86, 0x80, 0xb3, 0x01, 0x9d, 0x90, 0x01, 0xa0,
+                       0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
+               }
+       },
+};
+
+int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);
index 6f52dfd14f59fa8e7aecf865c21cd43466e09b95..2050b17d81d4dce86b53b2263e63c5bb33844e76 100644 (file)
@@ -41,6 +41,9 @@ endif
 COBJS  += 4xx_pci.o
 COBJS  += 4xx_pcie.o
 COBJS  += bedbug_405.o
+ifdef CONFIG_CMD_CHIP_CONFIG
+COBJS  += cmd_chip_config.o
+endif
 COBJS  += commproc.o
 COBJS  += cpu.o
 COBJS  += cpu_init.o
diff --git a/cpu/ppc4xx/cmd_chip_config.c b/cpu/ppc4xx/cmd_chip_config.c
new file mode 100644 (file)
index 0000000..d360d5b
--- /dev/null
@@ -0,0 +1,142 @@
+/*
+ * (C) Copyright 2008-2009
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * (C) Copyright 2009
+ * Dirk Eibach,  Guntermann & Drunck GmbH, eibach@gdsys.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <command.h>
+#include <i2c.h>
+#include <asm/ppc4xx_config.h>
+#include <asm/io.h>
+
+static void print_configs(int cur_config_nr)
+{
+       int i;
+
+       for (i = 0; i < ppc4xx_config_count; i++) {
+               printf("%-16s - %s", ppc4xx_config_val[i].label,
+                      ppc4xx_config_val[i].description);
+               if (i == cur_config_nr)
+                       printf(" ***");
+               printf("\n");
+       }
+
+}
+
+static int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+       int i;
+       int ret;
+       int cur_config_nr = -1;
+       u8 cur_config[CONFIG_4xx_CONFIG_BLOCKSIZE];
+
+#ifdef CONFIG_CMD_EEPROM
+       ret = eeprom_read(CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR,
+                         CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET,
+                         cur_config, CONFIG_4xx_CONFIG_BLOCKSIZE);
+#else
+       ret = i2c_read(CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR,
+                      CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET,
+                      1, cur_config, CONFIG_4xx_CONFIG_BLOCKSIZE);
+#endif
+       if (ret) {
+               printf("Error reading EEPROM at addr 0x%x\n",
+                      CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR);
+               return -1;
+       }
+
+       /*
+        * Search the current configuration
+        */
+       for (i = 0; i < ppc4xx_config_count; i++) {
+               if (memcmp(cur_config, ppc4xx_config_val[i].val,
+                          CONFIG_4xx_CONFIG_BLOCKSIZE) == 0)
+                       cur_config_nr = i;
+       }
+
+       if (cur_config_nr == -1) {
+               printf("Warning: The I2C bootstrap values don't match any"
+                      " of the available options!\n");
+               printf("I2C bootstrap EEPROM values are (I2C address 0x%02x):\n",
+                       CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR);
+               for (i = 0; i < CONFIG_4xx_CONFIG_BLOCKSIZE; i++) {
+                       printf("%02x ", cur_config[i]);
+               }
+               printf("\n");
+       }
+
+       if (argc < 2) {
+               printf("Available configurations (I2C address 0x%02x):\n",
+                      CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR);
+               print_configs(cur_config_nr);
+               return 0;
+       }
+
+       for (i = 0; i < ppc4xx_config_count; i++) {
+               /*
+                * Search for configuration name/label
+                */
+               if (strcmp(argv[1], ppc4xx_config_val[i].label) == 0) {
+                       printf("Using configuration:\n%-16s - %s\n",
+                              ppc4xx_config_val[i].label,
+                              ppc4xx_config_val[i].description);
+
+#ifdef CONFIG_CMD_EEPROM
+                       ret = eeprom_write(CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR,
+                                          CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET,
+                                          ppc4xx_config_val[i].val,
+                                          CONFIG_4xx_CONFIG_BLOCKSIZE);
+#else
+                       ret = i2c_write(CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR,
+                                       CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET,
+                                       1, ppc4xx_config_val[i].val,
+                                       CONFIG_4xx_CONFIG_BLOCKSIZE);
+#endif
+                       udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
+                       if (ret) {
+                               printf("Error updating EEPROM at addr 0x%x\n",
+                                      CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR);
+                               return -1;
+                       }
+
+                       printf("done (dump via 'i2c md %x 0.1 %x')\n",
+                              CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR,
+                              CONFIG_4xx_CONFIG_BLOCKSIZE);
+                       printf("Reset the board for the changes to"
+                              " take effect\n");
+                       return 0;
+               }
+       }
+
+       printf("Configuration %s not found!\n", argv[1]);
+       print_configs(cur_config_nr);
+       return -1;
+}
+
+U_BOOT_CMD(
+       chip_config,    2,      0,      do_chip_config,
+       "program the I2C bootstrap EEPROM",
+       "[config-label]"
+);
diff --git a/include/asm-ppc/ppc4xx_config.h b/include/asm-ppc/ppc4xx_config.h
new file mode 100644 (file)
index 0000000..49acb60
--- /dev/null
@@ -0,0 +1,42 @@
+/*
+ * (C) Copyright 2008-2009
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * (C) Copyright 2009
+ * Dirk Eibach,  Guntermann & Drunck GmbH, eibach@gdsys.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __PPC4xx_CONFIG_H
+#define __PPC4xx_CONFIG_H
+
+#include <common.h>
+
+struct ppc4xx_config {
+       char label[16];
+       char description[64];
+       u8 val[CONFIG_4xx_CONFIG_BLOCKSIZE];
+};
+
+extern struct ppc4xx_config ppc4xx_config_val[];
+extern int ppc4xx_config_count;
+
+#endif /* __PPC4xx_CONFIG_H */
index d22d4113deb5e9d4719d32f9a967b79bc5259d92..217a8ee009b5ed8b01da694cff34025c485d1f29 100644 (file)
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS      3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  10
 
+/* I2C bootstrap EEPROM */
+#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR      0x52
+#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET    0
+#define CONFIG_4xx_CONFIG_BLOCKSIZE            16
+
 /* I2C SYSMON (LM75, AD7414 is almost compatible)                      */
 #define CONFIG_DTT_LM75                1               /* ON Semi's LM75       */
 #define CONFIG_DTT_AD7414      1               /* use AD7414           */
 /*
  * Commands additional to the ones defined in amcc-common.h
  */
+#define CONFIG_CMD_CHIP_CONFIG
 #if defined(CONFIG_ARCHES)
 #define CONFIG_CMD_DTT
 #define CONFIG_CMD_PCI