x86: minnowmax: add GPIO banks in the device tree

There are 6 banks:
    4 banks for CORE: available in S0 mode
    2 banks for SUS (Suspend): available in S0-S5 mode

Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
index ecd4a892c0b60dfff95e939e30239cfbdecd1bbc..4be227a3b08f9206256ca7b79bc5332485d63834 100644 (file)
--- a/arch/x86/dts/minnowmax.dts
+++ b/arch/x86/dts/minnowmax.dts
@@ -22,6 +22,48 @@
                silent_console = <0>;
        };
 
+       gpioa {
+               compatible = "intel,ich6-gpio";
+               u-boot,dm-pre-reloc;
+               reg = <0 0x20>;
+               bank-name = "A";
+       };
+
+       gpiob {
+               compatible = "intel,ich6-gpio";
+               u-boot,dm-pre-reloc;
+               reg = <0x20 0x20>;
+               bank-name = "B";
+       };
+
+       gpioc {
+               compatible = "intel,ich6-gpio";
+               u-boot,dm-pre-reloc;
+               reg = <0x40 0x20>;
+               bank-name = "C";
+       };
+
+       gpiod {
+               compatible = "intel,ich6-gpio";
+               u-boot,dm-pre-reloc;
+               reg = <0x60 0x20>;
+               bank-name = "D";
+       };
+
+       gpioe {
+               compatible = "intel,ich6-gpio";
+               u-boot,dm-pre-reloc;
+               reg = <0x80 0x20>;
+               bank-name = "E";
+       };
+
+       gpiof {
+               compatible = "intel,ich6-gpio";
+               u-boot,dm-pre-reloc;
+               reg = <0xA0 0x20>;
+               bank-name = "F";
+       };
+
        chosen {
                stdout-path = "/serial";
        };