am33xx: add ti814x specific register definitions

Support the ti814x specific register definitions within
arch-am33xx.

Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>

diff --git a/arch/arm/cpu/armv7/am33xx/sys_info.c b/arch/arm/cpu/armv7/am33xx/sys_info.c
index db99e9535ff3379f29fcecf1f5c73e7361a3e6d4..5fd8b47b2d24e1b41b87df653abd4118b37ba05c 100644 (file)
--- a/arch/arm/cpu/armv7/am33xx/sys_info.c
+++ b/arch/arm/cpu/armv7/am33xx/sys_info.c
@@ -98,6 +98,9 @@ int print_cpuinfo(void)
        case AM335X:
                cpu_s = "AM335X";
                break;
+       case TI81XX:
+               cpu_s = "TI81XX";
+               break;
        default:
                cpu_s = "Unknown cpu type";
                break;

diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h
index 16e8a80700a497936f8c14cd4f023892b7a4c6b7..3d3a7c8ac213ac74f8f0f4de2f38529f3438c0b2 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -42,9 +42,10 @@
 #define HS_DEVICE                      0x2
 #define GP_DEVICE                      0x3
 
-/* cpu-id for AM33XX family */
+/* cpu-id for AM33XX and TI81XX family */
 #define AM335X                         0xB944
-#define DEVICE_ID                      0x44E10600
+#define TI81XX                         0xB81E
+#define DEVICE_ID                      (CTRL_BASE + 0x0600)
 
 /* This gives the status of the boot mode pins on the evm */
 #define SYSBOOT_MASK                   (BIT(0) | BIT(1) | BIT(2)\
@@ -52,9 +53,11 @@
 
 /* Reset control */
 #ifdef CONFIG_AM33XX
-#define PRM_RSTCTRL                    0x44E00F00
-#define PRM_RSTST                      0x44E00F08
+#define PRM_RSTCTRL                    (PRCM_BASE + 0x0F00)
+#elif defined(CONFIG_TI814X)
+#define PRM_RSTCTRL                    (PRCM_BASE + 0x00A0)
 #endif
+#define PRM_RSTST                      (PRM_RSTCTRL + 8)
 #define PRM_RSTCTRL_RESET              0x01
 #define PRM_RSTST_WARM_RESET_MASK      0x232
 

diff --git a/arch/arm/include/asm/arch-am33xx/hardware.h b/arch/arm/include/asm/arch-am33xx/hardware.h
index 24a9b8d2d4ce99958e894f2b0ad673fa39a18873..5a27f9cf5e0fe4e5caa43951abdafe265a79ecf6 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/hardware.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware.h
@@ -19,6 +19,7 @@
 #ifndef __AM33XX_HARDWARE_H
 #define __AM33XX_HARDWARE_H
 
+#include <config.h>
 #include <asm/arch/omap.h>
 #ifdef CONFIG_AM33XX
 #include <asm/arch/hardware_am33xx.h>
@@ -26,8 +27,9 @@
 #include <asm/arch/hardware_ti814x.h>
 #endif
 
-/* Module base addresses */
-#define UART0_BASE                     0x44E09000
+/*
+ * Common hardware definitions
+ */
 
 /* DM Timer base addresses */
 #define DM_TIMER0_BASE                 0x4802C000
@@ -42,21 +44,10 @@
 /* GPIO Base address */
 #define GPIO0_BASE                     0x48032000
 #define GPIO1_BASE                     0x4804C000
-#define GPIO2_BASE                     0x481AC000
 
 /* BCH Error Location Module */
 #define ELM_BASE                       0x48080000
 
-/* Watchdog Timer */
-#define WDT_BASE                       0x44E35000
-
-/* Control Module Base Address */
-#define CTRL_BASE                      0x44E10000
-#define CTRL_DEVICE_BASE               0x44E10600
-
-/* PRCM Base Address */
-#define PRCM_BASE                      0x44E00000
-
 /* EMIF Base address */
 #define EMIF4_0_CFG_BASE               0x4C000000
 #define EMIF4_1_CFG_BASE               0x4D000000
@@ -90,10 +81,6 @@
 
 /* CPSW Config space */
 #define CPSW_BASE                      0x4A100000
-#define CPSW_MDIO_BASE                 0x4A101000
-
-/* RTC base address */
-#define RTC_BASE                       0x44E3E000
 
 /* OTG */
 #define USB0_OTG_BASE                  0x47401000

diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
index 7a4070c6af463ead6bd5fd6fcf37ae53bf66ebc2..fa02f195ff7790a3b00bf762861b27bed783b728 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware_am33xx.h
@@ -19,6 +19,24 @@
 #ifndef __AM33XX_HARDWARE_AM33XX_H
 #define __AM33XX_HARDWARE_AM33XX_H
 
+/* Module base addresses */
+
+/* UART Base Address */
+#define UART0_BASE                     0x44E09000
+
+/* GPIO Base address */
+#define GPIO2_BASE                     0x481AC000
+
+/* Watchdog Timer */
+#define WDT_BASE                       0x44E35000
+
+/* Control Module Base Address */
+#define CTRL_BASE                      0x44E10000
+#define CTRL_DEVICE_BASE               0x44E10600
+
+/* PRCM Base Address */
+#define PRCM_BASE                      0x44E00000
+
 /* VTP Base address */
 #define VTP0_CTRL_ADDR                 0x44E10E0C
 
@@ -27,4 +45,10 @@
 #define DDR_PHY_DATA_ADDR              0x44E120C8
 #define DDR_DATA_REGS_NR               2
 
+/* CPSW Config space */
+#define CPSW_MDIO_BASE                 0x4A101000
+
+/* RTC base address */
+#define RTC_BASE                       0x44E3E000
+
 #endif /* __AM33XX_HARDWARE_AM33XX_H */

diff --git a/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h b/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h
index af7d1d82e766b1b49661973c2b34bbba2e7749a2..a950ac3c188a0ad090fbe228f0517a13839c7f79 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h
@@ -19,6 +19,23 @@
 #ifndef __AM33XX_HARDWARE_TI814X_H
 #define __AM33XX_HARDWARE_TI814X_H
 
+/* Module base addresses */
+
+/* UART Base Address */
+#define UART0_BASE                     0x48020000
+
+/* Watchdog Timer */
+#define WDT_BASE                       0x481C7000
+
+/* Control Module Base Address */
+#define CTRL_BASE                      0x48140000
+
+/* PRCM Base Address */
+#define PRCM_BASE                      0x48180000
+
+/* PLL Subsystem Base Address */
+#define PLL_SUBSYS_BASE                        0x481C5000
+
 /* VTP Base address */
 #define VTP0_CTRL_ADDR                 0x48140E0C
 
@@ -27,4 +44,10 @@
 #define DDR_PHY_DATA_ADDR              0x47C0C4C8
 #define DDR_DATA_REGS_NR               4
 
+/* CPSW Config space */
+#define CPSW_MDIO_BASE                 0x4A100800
+
+/* RTC base address */
+#define RTC_BASE                       0x480C0000
+
 #endif /* __AM33XX_HARDWARE_TI814X_H */

diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h
index 850f8a551d8381c5896a19e3ee101f8fb876a20a..d28f9a83ff25b249d76eb3485a9f5352a110a92c 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/omap.h
+++ b/arch/arm/include/asm/arch-am33xx/omap.h
@@ -28,8 +28,13 @@
  * Non-secure RAM starts at 0x40300000 for GP devices. But we keep SRAM_BASE
  * at 0x40304000(EMU base) so that our code works for both EMU and GP
  */
+#ifdef CONFIG_AM33XX
 #define NON_SECURE_SRAM_START  0x40304000
 #define NON_SECURE_SRAM_END    0x4030E000
+#elif defined(CONFIG_TI814X)
+#define NON_SECURE_SRAM_START  0x40300000
+#define NON_SECURE_SRAM_END    0x40320000
+#endif
 
 /* ROM code defines */
 /* Boot device */

diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h
index e961ce0578a8e7839bc7c1ba9c3899c00e4241c2..f60b086366ce39511cdaedde80833241e05924da 100644 (file)
--- a/arch/arm/include/asm/arch-am33xx/spl.h
+++ b/arch/arm/include/asm/arch-am33xx/spl.h
@@ -25,8 +25,13 @@
 
 #define BOOT_DEVICE_XIP        2
 #define BOOT_DEVICE_NAND       5
+#ifdef CONFIG_AM33XX
 #define BOOT_DEVICE_MMC1       8
 #define BOOT_DEVICE_MMC2       9       /* eMMC or daughter card */
+#elif defined(CONFIG_TI814X)
+#define BOOT_DEVICE_MMC1       9
+#define BOOT_DEVICE_MMC2       8       /* ROM only supports 2nd instance */
+#endif
 #define BOOT_DEVICE_SPI                11
 #define BOOT_DEVICE_UART       65
 #define BOOT_DEVICE_USBETH     68