arm: socfpga: spl: update peripheral pll for dev kit

"commit 0d13a0051b2c arm: socfpga: Sync Cyclone V DK PLL configuration"
mistakenly changed CONFIG_HPS_MAINPLLGRP_VCO_NUMER to 39, the correct
value should be 79.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>

diff --git a/board/altera/socfpga/pll_config.h b/board/altera/socfpga/pll_config.h
index 8130fa47444c8415b83845a3aca82de58d03d5f0..7cd25df61456981a8cbff272dcaf00a75f0c982f 100644 (file)
--- a/board/altera/socfpga/pll_config.h
+++ b/board/altera/socfpga/pll_config.h
@@ -36,7 +36,7 @@
 
 /* Peripheral PLL */
 #define CONFIG_HPS_PERPLLGRP_VCO_DENOM                 (1)
-#define CONFIG_HPS_PERPLLGRP_VCO_NUMER                 (39)
+#define CONFIG_HPS_PERPLLGRP_VCO_NUMER                 (79)
 /*
  * To tell where is the VCOs source:
  * 0 = EOSC1