* Patch by Hojin, 17 Sep 2004:
Fix typo in cfi_flash.c
-
+
* Patch by Mark Jonas, 09 September 2004:
mtest's data line test (with CFG_ALT_MEMTEST set) returned a wrong
error message
I named the board dbau1x00, to allow
support for all three development boards
( dbau1000, dbau1100 and dbau1500 ).
-Now there is a new board called dbau1550 also, which
+Now there is a new board called dbau1550 also, which
should be supported RSN.
I only have a dbau1000, so my testing is limited
boot loader delivered with board.
NOTE! When you switch between the two boot flashes, the
-base addresses will be swapped.
+base addresses will be swapped.
Have this in mind when you compile u-boot. TEXT_BASE has
-to match the address where u-boot is located when you
-actually launch.
+to match the address where u-boot is located when you
+actually launch.
Ethernet only supported for mac0.
* - short between data lines
*/
-static long int dram_size (long int mamr_value, long int *base,
- long int maxsize)
+static long int dram_size (long int mamr_value, long int *base, long int maxsize)
{
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile memctl8xx_t *memctl = &immap->im_memctl;
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
void nand_init(void)
{
+ extern unsigned long nand_probe(unsigned long physadr);
+
unsigned long totlen = nand_probe(CFG_NAND_BASE);
printf ("%4lu MB\n", totlen >> 20);
}
#endif
-
*/
mov r0, #0x10000000 /* Load physical SDRAM base. */
mov r1, pc /* Get current execution location. */
- /* Zero all but top 6 bits of PC, as they alone detect whether an
+ /* Zero all but top 6 bits of PC, as they alone detect whether an
* address is in the range 0x1000:0000-0x13ff:ffff, the 64M sized
* valid range for SDRAM on the OMAP 1510/5910.
*/
int serial_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
-
+
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
void serial_setbrg (void)
{
DECLARE_GLOBAL_DATA_PTR;
-
+
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
int serial_getc (void)
{
DECLARE_GLOBAL_DATA_PTR;
-
+
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
int serial_tstc (void)
{
DECLARE_GLOBAL_DATA_PTR;
-
+
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
void serial_putc (const char c)
{
DECLARE_GLOBAL_DATA_PTR;
-
+
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
void serial_puts (const char *s)
{
DECLARE_GLOBAL_DATA_PTR;
-
+
if (!(gd->flags & GD_FLG_RELOC) || !serial_current) {
struct serial_device *dev = default_serial_console ();
-The port was tested on Wind River System Sbc8560 board <www.windriver.com>. U-Boot was
-installed on the flash memory of the CPU card (no the SODIMM).
+The port was tested on Wind River System Sbc8560 board
+<www.windriver.com>. U-Boot was installed on the flash memory of the
+CPU card (no the SODIMM).
-NOTE: Please configure uboot compile to the proper PCI frequency and setup the
-appropriate DIP switch settings.
+NOTE: Please configure uboot compile to the proper PCI frequency and
+setup the appropriate DIP switch settings.
SBC8560 board:
-Make sure boards switches are set to their appropriate conditions. Refer
-to the Engineering Reference Guide ERG-00300-002. Of particular
-importance are: 1)Tthe settings for JP4 (JP4 1-3 and 2-4), which select
-the on-board FLASH device (Intel 28F128Jx); 2) The settings for the Clock SW9 (33 MHz
-or 66 MHz).
+Make sure boards switches are set to their appropriate conditions.
+Refer to the Engineering Reference Guide ERG-00300-002. Of particular
+importance are: 1) the settings for JP4 (JP4 1-3 and 2-4), which
+select the on-board FLASH device (Intel 28F128Jx); 2) The settings
+for the Clock SW9 (33 MHz or 66 MHz).
- Note: SW9 Settings: 66 MHz
- 4:1 ratio CCB clocks:SYSCLK
+ Note: SW9 Settings: 66 MHz
+ 4:1 ratio CCB clocks:SYSCLK
3:1 ration e500 Core:CCB
pos1 - on, pos2 - on, pos3 - off, pos4 - on, pos5 - off, pos6 - on
- Note: SW9 Settings: 33 MHz
+ Note: SW9 Settings: 33 MHz
8:1 ratio CCB clocks:SYSCLK
3:1 ration e500 Core:CCB
pos1 - on, pos2 - on, pos3 - on, pos4 - off, pos5 - off, pos6 - on
-
+
Flashing the FLASH device with the "Wind River ICE":
-1) Properly connect and configure the Wind River ICE to the
- target JTAG port. This includes running the SBC8560 register script.
- Make sure target memory can be read and written.
+1) Properly connect and configure the Wind River ICE to the target
+ JTAG port. This includes running the SBC8560 register script. Make
+ sure target memory can be read and written.
2) Build the u-boot image:
make distclean
make SBC8560_66_config or SBC8560_33_config
make CROSS_COMPILE=.../ELDK3.0/ppc_8xx-/ all
- Note: reference is made to the ELDK3.0 compiler. Further, it seems the ppc_8xx compiler is
- required for the 85xx (no 85xx designated compiler in ELDK3.0)
+ Note: reference is made to the ELDK3.0 compiler. Further, it seems
+ the ppc_8xx compiler is required for the 85xx (no 85xx
+ designated compiler in ELDK3.0)
-3) Convert the uboot (.elf) file to a uboot.bin file (using visionClick converter).
- The bin file should be converted from fffc0000 to ffffffff
+3) Convert the uboot (.elf) file to a uboot.bin file (using
+ visionClick converter). The bin file should be converted from
+ fffc0000 to ffffffff
4) Setup the Flash Utility (tools menu) for:
-
+
Do a "dc clr" [visionClick] to load the default register settings
Determine the clock speed of the PCI bus and set SW9 accordingly
- Note: the speed of the PCI bus defaults to the slowest PCI card
+ Note: the speed of the PCI bus defaults to the slowest PCI card
PlayBack the "default" register file for the SBC8560
Select the uboot.bin file with zero bias
Select the initialize Target prior to programming
Select the start address from 0 with size of 4000
5) Erase and Program
-
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
CONFIG_AUTOBOOT_STOP_STR2
"bootdelaykey" environment variable
- "bootstopkey" environment variable
+ "bootstopkey" environment variable
"bootdelaykey2" environment variable
"bootstopkey2" environment variable
stop or delay autoboot.
Define CONFIG_AUTOBOOT_KEYED (no value required) to enable
- this group of options. CONFIG_AUTOBOOT_DELAY_STR,
+ this group of options. CONFIG_AUTOBOOT_DELAY_STR,
CONFIG_AUTOBOOT_STOP_STR or both should be specified (or
specified by the corresponding environment variable),
otherwise there is no way to stop autoboot.
down the seconds. "autoboot in %d seconds\n" is a reasonable
prompt.
- If CONFIG_AUTOBOOT_DELAY_STR or "bootdelaykey" is specified
- and this string is received from console input before
- autoboot starts booting, U-Boot gives a command prompt. The
- U-Boot prompt will time out if CONFIG_BOOT_RETRY_TIME is
- used, otherwise it never times out.
+ If CONFIG_AUTOBOOT_DELAY_STR or "bootdelaykey" is specified
+ and this string is received from console input before
+ autoboot starts booting, U-Boot gives a command prompt. The
+ U-Boot prompt will time out if CONFIG_BOOT_RETRY_TIME is
+ used, otherwise it never times out.
- If CONFIG_AUTOBOOT_STOP_STR or "bootstopkey" is specified and
- this string is received from console input before autoboot
- starts booting, U-Boot gives a command prompt. The U-Boot
- prompt never times out, even if CONFIG_BOOT_RETRY_TIME is
- used.
+ If CONFIG_AUTOBOOT_STOP_STR or "bootstopkey" is specified and
+ this string is received from console input before autoboot
+ starts booting, U-Boot gives a command prompt. The U-Boot
+ prompt never times out, even if CONFIG_BOOT_RETRY_TIME is
+ used.
The string recognition is not very sophisticated. If a
partial match is detected, the first non-matching character
character of a key string does not appear in the rest of the
string.
- Using the CONFIG_AUTOBOOT_DELAY_STR2 #define or the
- "bootdelaykey2" environment variable and/or the
- CONFIG_AUTOBOOT_STOP_STR2 #define or the "bootstopkey"
- environment variable you can specify a second, alternate
- string (which allows you to have two "password" strings).
+ Using the CONFIG_AUTOBOOT_DELAY_STR2 #define or the
+ "bootdelaykey2" environment variable and/or the
+ CONFIG_AUTOBOOT_STOP_STR2 #define or the "bootstopkey"
+ environment variable you can specify a second, alternate
+ string (which allows you to have two "password" strings).
CONFIG_ZERO_BOOTDELAY_CHECK
/* make sure you change the MAC address and other network params first,
* search for CONFIG_ETHADDR,CONFIG_SERVERIP,etc in this file
*/
-
+
#ifndef __CONFIG_H
#define __CONFIG_H
#define CFG_NS16550_COM1 ((CFG_BR5_PRELIM & 0xff000000)+0x00700000)
#define CFG_NS16550_COM2 ((CFG_BR5_PRELIM & 0xff000000)+0x00800000)
#else
-/* SBC8540 uses internal COMM controller */
+/* SBC8540 uses internal COMM controller */
#define CFG_NS16550_COM1 ((CFG_CCSRBAR & 0xfff00000)+0x00004500)
#define CFG_NS16550_COM2 ((CFG_CCSRBAR & 0xfff00000)+0x00004600)
#endif
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 25 /* PHY address */
-
+
#elif defined(CONFIG_ETHER_ON_FCC) /* CPM FCC Ethernet */
#undef CONFIG_ETHER_NONE /* define if ether on something else */
#define CONFIG_ETHER_ON_FCC2 /* cpm FCC ethernet support */
#define CONFIG_ETHER_INDEX 2 /* which channel for ether */
-
+
#if (CONFIG_ETHER_INDEX == 2)
/*
* - Rx-CLK is CLK13
#define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
#define CFG_CPMFCR_RAMTYPE 0
#define CFG_FCC_PSMR (FCC_PSMR_FDE)
-
+
#elif (CONFIG_ETHER_INDEX == 3)
/* need more definitions here for FE3 */
#endif /* CONFIG_ETHER_INDEX */
-
+
#define CONFIG_MII /* MII PHY management */
#define CONFIG_BITBANGMII /* bit-bang MII PHY management */
/*
else iop->pdat &= ~0x00200000
#define MIIDELAY udelay(1)
-
+
#endif
/*-----------------------------------------------------------------------
/* make sure you change the MAC address and other network params first,
* search for CONFIG_ETHADDR,CONFIG_SERVERIP,etc in this file
*/
-
+
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 25 /* PHY address */
-
+
#elif defined(CONFIG_ETHER_ON_FCC) /* CPM FCC Ethernet */
#undef CONFIG_ETHER_NONE /* define if ether on something else */
#define CONFIG_ETHER_ON_FCC2 /* cpm FCC ethernet support */
#define CONFIG_ETHER_INDEX 2 /* which channel for ether */
-
+
#if (CONFIG_ETHER_INDEX == 2)
/*
* - Rx-CLK is CLK13
#define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
#define CFG_CPMFCR_RAMTYPE 0
#define CFG_FCC_PSMR (FCC_PSMR_FDE)
-
+
#elif (CONFIG_ETHER_INDEX == 3)
/* need more definitions here for FE3 */
#endif /* CONFIG_ETHER_INDEX */
-
+
#define CONFIG_MII /* MII PHY management */
#define CONFIG_BITBANGMII /* bit-bang MII PHY management */
/*
else iop->pdat &= ~0x00200000
#define MIIDELAY udelay(1)
-
+
#endif
/*-----------------------------------------------------------------------
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