* Patches by Stephan Linz, 3 Nov 2003:

  - more endianess fixes for LAN91C111 driver
  - CFG_HZ configuration patch for NIOS Cyclone board

* Patch by Stephan Linz, 28 Oct 2003:
  fix PHY_INT_REG vs. PHY_MASK_REG bug in drivers/smc91111.c

* Patch by Steven Scholz, 20 Oct 2003:
  - make "mii info <addr>" show infor for PHY at "addr" only
  - Endian fix for miiphy_info()

diff --git a/CHANGELOG b/CHANGELOG
index 974ce57731cc7405d8c28fa224e91df56b629868..f8129e458427ebd88d82c751073e8f7fd6a07e25 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,17 @@
 Changes since U-Boot 1.0.0:
 ======================================================================
 
+* Patches by Stephan Linz, 3 Nov 2003:
+  - more endianess fixes for LAN91C111 driver
+  - CFG_HZ configuration patch for NIOS Cyclone board
+
+* Patch by Stephan Linz, 28 Oct 2003:
+  fix PHY_INT_REG vs. PHY_MASK_REG bug in drivers/smc91111.c
+
+* Patch by Steven Scholz, 20 Oct 2003:
+  - make "mii info <addr>" show infor for PHY at "addr" only
+  - Endian fix for miiphy_info()
+
 * Patch by Gleb Natapov, 19 Sep 2003:
   Move most of the timer interrupt related PPC code to ppc_lib/interrupts.c
 

diff --git a/common/cmd_mii.c b/common/cmd_mii.c
index 18fad1e34ffc8cad67496e7086750042f76b083a..94874ddfe0bb16182047f34c729a3dd093293bf6 100644 (file)
--- a/common/cmd_mii.c
+++ b/common/cmd_mii.c
@@ -81,7 +81,7 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
         * check info/read/write.
         */
        if (op == 'i') {
-               int j;
+               unsigned char j, start, end;
                unsigned int oui;
                unsigned char model;
                unsigned char rev;
@@ -89,7 +89,13 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
                /*
                 * Look for any and all PHYs.  Valid addresses are 0..31.
                 */
-               for (j = 0; j < 32; j++) {
+               if (argc >= 3) {
+                       start = addr; end = addr + 1;
+               } else {
+                       start = 0; end = 32;
+               }
+
+               for (j = start; j < end; j++) {
                        if (miiphy_info (j, &oui, &model, &rev) == 0) {
                                printf ("PHY 0x%02X: "
                                        "OUI = 0x%04X, "

diff --git a/common/miiphyutil.c b/common/miiphyutil.c
index 75c2df5caedd772ef9cdd1ee71b76193be06021c..af8c7c7a310695dc45d0c7d9a805a353b97b5769 100644 (file)
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -47,19 +47,15 @@ int miiphy_info (unsigned char addr,
                 unsigned char *model, unsigned char *rev)
 {
        unsigned int reg = 0;
+       unsigned short tmp;
 
-       /*
-        * Trick: we are reading two 16 registers into a 32 bit variable
-        * so we do a 16 read into the high order bits of the variable (big
-        * endian, you know), shift it down 16 bits, and the read the rest.
-        */
-       if (miiphy_read (addr, PHY_PHYIDR2, (unsigned short *) &reg) != 0) {
+       if (miiphy_read (addr, PHY_PHYIDR2, &tmp) != 0) {
 #ifdef DEBUG
                printf ("PHY ID register 2 read failed\n");
 #endif
                return (-1);
        }
-       reg >>= 16;
+       reg = tmp;
 
 #ifdef DEBUG
        printf ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg);
@@ -69,12 +65,13 @@ int miiphy_info (unsigned char addr,
                return (-1);
        }
 
-       if (miiphy_read (addr, PHY_PHYIDR1, (unsigned short *) &reg) != 0) {
+       if (miiphy_read (addr, PHY_PHYIDR1, &tmp) != 0) {
 #ifdef DEBUG
                printf ("PHY ID register 1 read failed\n");
 #endif
                return (-1);
        }
+       reg |= tmp << 16;
 #ifdef DEBUG
        printf ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
 #endif

diff --git a/drivers/smc91111.c b/drivers/smc91111.c
index 3146ff4c9ea90ed6b7f553bdcd77344061c85a85..6c3a0b753c0a6a7741b0766299fcbce8dd98a6e9 100644 (file)
--- a/drivers/smc91111.c
+++ b/drivers/smc91111.c
@@ -71,10 +71,12 @@
 
 #define NO_AUTOPROBE
 
+#define SMC_DEBUG 0
+
+#if SMC_DEBUG > 1
 static const char version[] =
        "smc91111.c:v1.0 04/25/01 by Daris A Nevil (dnevil@snmc.com)\n";
-
-#define SMC_DEBUG 0
+#endif
 
 /*------------------------------------------------------------------------
  .
@@ -212,7 +214,7 @@ int get_rom_mac(char *v_rom_mac);
  ------------------------------------------------------------
 */
 
-static char smc_mac_addr[] = {0x02, 0x80, 0xad, 0x20, 0x31, 0xb8};
+static char unsigned smc_mac_addr[6] = {0x02, 0x80, 0xad, 0x20, 0x31, 0xb8};
 
 /*
  * This function must be called before smc_open() if you want to override
@@ -623,7 +625,7 @@ again:
                return 0;
        } else {
                /* ack. int */
-               SMC_outw (IM_TX_INT, SMC91111_INT_REG);
+               SMC_outb (IM_TX_INT, SMC91111_INT_REG);
                PRINTK2 ("%s: Sent packet of length %d \n", SMC_DEV_NAME,
                         length);
 
@@ -729,7 +731,6 @@ static int smc_rcv()
        dword stat_len;
 #endif
 
-
        SMC_SELECT_BANK(2);
        packet_number = SMC_inw( RXFIFO_REG );
 
@@ -1223,7 +1224,7 @@ static void smc_phy_configure ()
 
        /* Enable PHY Interrupts (for register 18) */
        /* Interrupts listed here are disabled */
-       smc_write_phy_register (PHY_INT_REG, 0xffff);
+       smc_write_phy_register (PHY_MASK_REG, 0xffff);
 
        /* Configure the Receive/Phy Control register */
        SMC_SELECT_BANK (0);

diff --git a/drivers/smc91111.h b/drivers/smc91111.h
index fc694ac725238e9987036b020d2b3494f78df105..1e458a423632e0fa2981396338df43225c69dc1a 100644 (file)
--- a/drivers/smc91111.h
+++ b/drivers/smc91111.h
@@ -306,7 +306,17 @@ typedef unsigned long int          dword;
 #define RPC_LED_100    (0x05)  /* LED = 100Mbps link dectect */
 #define RPC_LED_TX     (0x06)  /* LED = TX packet occurred */
 #define RPC_LED_RX     (0x07)  /* LED = RX packet occurred */
-#define RPC_DEFAULT (RPC_ANEG | (RPC_LED_100 << RPC_LSXA_SHFT) | (RPC_LED_FD << RPC_LSXB_SHFT) | RPC_SPEED | RPC_DPLX)
+#if defined(CONFIG_DK1C20)
+/* buggy schematic: LEDa -> yellow, LEDb --> green */
+#define RPC_DEFAULT    ( RPC_SPEED | RPC_DPLX | RPC_ANEG       \
+                       | (RPC_LED_TX_RX << RPC_LSXA_SHFT)      \
+                       | (RPC_LED_100_10 << RPC_LSXB_SHFT)     )
+#else
+/* SMSC reference design: LEDa --> green, LEDb --> yellow */
+#define RPC_DEFAULT    ( RPC_SPEED | RPC_DPLX | RPC_ANEG       \
+                       | (RPC_LED_100_10 << RPC_LSXA_SHFT)     \
+                       | (RPC_LED_TX_RX << RPC_LSXB_SHFT)      )
+#endif
 
 /* Bank 0 0x000C is reserved */
 

diff --git a/include/configs/DK1C20.h b/include/configs/DK1C20.h
index 938e83aec52a1a3a35e307c24bb9893d6520a749..87ba760094b2168ca512beb196638a8c493cf612 100644 (file)
--- a/include/configs/DK1C20.h
+++ b/include/configs/DK1C20.h
@@ -158,7 +158,7 @@
 #define        CFG_MAXARGS             16              /* max number of command args   */
 #define CFG_BARGSIZE           CFG_CBSIZE      /* Boot Argument Buffer Size    */
 #undef  CFG_CLKS_IN_HZ
-#define        CFG_HZ                  1562500
+#define        CFG_HZ                  1000            /* decr freq: 1ms ticks */
 #define CFG_LOAD_ADDR          0x00800000      /* Default load address */
 
 #define CFG_MEMTEST_START      0x00000000