ARMv8/ls2085a: Enable secondary cores

Spin table is at the very beginning of boot code. Each core has an individual
release address within the spin table, the ft_cpu_setup fn updates the
"cpu-release-addr" property of each cpu node with the corresponding release
address.

Also fix CPU_RELEASE_ADDR to point to secondary_boot_func.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>

diff --git a/board/freescale/ls2085a/ls2085a.c b/board/freescale/ls2085a/ls2085a.c
index c2a726b76e1870de0b72b05e8f8dc1936dbd48e0..2c79a7181ecc53db55eb50591470f44e3ea1efc2 100644 (file)
--- a/board/freescale/ls2085a/ls2085a.c
+++ b/board/freescale/ls2085a/ls2085a.c
@@ -105,6 +105,8 @@ void ft_board_setup(void *blob, bd_t *bd)
        phys_addr_t base;
        phys_size_t size;
 
+       ft_cpu_setup(blob, bd);
+
        /* limit the memory size to bank 1 until Linux can handle 40-bit PA */
        base = getenv_bootm_low();
        size = getenv_bootm_size();

diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h
index 5ac7623f76288612b4c084586a2beead5bbdba3f..1455f888ffb19ba1da17408a5fadd424f13c2e68 100644 (file)
--- a/include/configs/ls2085a_common.h
+++ b/include/configs/ls2085a_common.h
@@ -47,15 +47,17 @@
 
 #define CONFIG_SYS_FSL_DDR_INTLV_256B  /* force 256 byte interleaving */
 
-/* SMP Definitions */
-#define CPU_RELEASE_ADDR               CONFIG_SYS_INIT_SP_ADDR
-
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000UL
 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY      0
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 #define CONFIG_SYS_DDR_BLOCK2_BASE     0x8080000000ULL
 #define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS      2
 
+/*
+ * SMP Definitinos
+ */
+#define CPU_RELEASE_ADDR               secondary_boot_func
+
 #define CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
 #define CONFIG_SYS_DP_DDR_BASE         0x6000000000ULL
 /*
@@ -241,6 +243,7 @@
 
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_LOAD_ADDR   (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
+#define CONFIG_ARCH_EARLY_INIT_R
 
 /* Physical Memory Map */
 /* fixme: these need to be checked against the board */