hang();
}
- return readl(map->base);
+ return readl(map->ranges[0].start);
}
static const struct udevice_id renesas_prr_ids[] = {
DECLARE_GLOBAL_DATA_PTR;
-static struct regmap *regmap_alloc_count(int count)
+static struct regmap *regmap_alloc(int count)
{
struct regmap *map;
- map = malloc(sizeof(struct regmap));
+ map = malloc(sizeof(*map) + sizeof(map->ranges[0]) * count);
if (!map)
return NULL;
- if (count <= 1) {
- map->range = &map->base_range;
- } else {
- map->range = malloc(count * sizeof(struct regmap_range));
- if (!map->range) {
- free(map);
- return NULL;
- }
- }
map->range_count = count;
return map;
struct regmap_range *range;
struct regmap *map;
- map = regmap_alloc_count(count);
+ map = regmap_alloc(count);
if (!map)
return -ENOMEM;
- map->base = *reg;
- for (range = map->range; count > 0; reg += 2, range++, count--) {
+ for (range = map->ranges; count > 0; reg += 2, range++, count--) {
range->start = *reg;
range->size = reg[1];
}
if (!count)
return -EINVAL;
- map = regmap_alloc_count(count);
+ map = regmap_alloc(count);
if (!map)
return -ENOMEM;
- for (range = map->range, index = 0; count > 0;
+ for (range = map->ranges, index = 0; count > 0;
count--, range++, index++) {
fdt_size_t sz;
if (of_live_active()) {
range->size = sz;
}
}
- map->base = map->range[0].start;
*mapp = map;
if (range_num >= map->range_count)
return NULL;
- range = &map->range[range_num];
+ range = &map->ranges[range_num];
return map_sysmem(range->start, range->size);
}
int regmap_uninit(struct regmap *map)
{
- if (map->range_count > 1)
- free(map->range);
free(map);
return 0;
int regmap_read(struct regmap *map, uint offset, uint *valp)
{
- uint32_t *ptr = map_physmem(map->base + offset, 4, MAP_NOCACHE);
+ u32 *ptr = map_physmem(map->ranges[0].start + offset, 4, MAP_NOCACHE);
*valp = le32_to_cpu(readl(ptr));
int regmap_write(struct regmap *map, uint offset, uint val)
{
- uint32_t *ptr = map_physmem(map->base + offset, 4, MAP_NOCACHE);
+ u32 *ptr = map_physmem(map->ranges[0].start + offset, 4, MAP_NOCACHE);
writel(cpu_to_le32(val), ptr);
void __iomem *reg;
/* set ctrl picophy value */
- reg = (void __iomem *)phy->regmap->base + phy->ctrl;
+ reg = (void __iomem *)phy->regmap->ranges[0].start + phy->ctrl;
/* CTRL_PORT mask is 0x1f */
clrsetbits_le32(reg, 0x1f, STIH407_USB_PICOPHY_CTRL_PORT_CONF);
/* set ports parameters overriding */
- reg = (void __iomem *)phy->regmap->base + phy->param;
+ reg = (void __iomem *)phy->regmap->ranges[0].start + phy->param;
/* PARAM_DEF mask is 0xffffffff */
clrsetbits_le32(reg, 0xffffffff, STIH407_USB_PICOPHY_PARAM_DEF);
int bank = pin_desc->bank;
int pin = pin_desc->pin;
- sysconfreg = (unsigned long *)plat->regmap->base;
+ sysconfreg = (unsigned long *)plat->regmap->ranges[0].start;
switch (bank) {
case 0 ... 5: /* in "SBC Bank" */
unsigned long *sysconfreg;
int bank = pin_desc->bank;
- sysconfreg = (unsigned long *)plat->regmap->base + 40;
+ sysconfreg = (unsigned long *)plat->regmap->ranges[0].start + 40;
/*
* NOTE: The PIO configuration for the PIO pins in the
return -ENODEV;
}
- return regmap->base;
+ return regmap->ranges[0].start;
}
static int sti_reset_program_hw(struct reset_ctl *reset_ctl, int assert)
return -ENODEV;
}
- priv->base = regmap->base;
+ priv->base = regmap->ranges[0].start;
return 0;
}
pr_err("unable to find regmap\n");
return -ENODEV;
}
- plat->syscfg_base = regmap->base;
+ plat->syscfg_base = regmap->ranges[0].start;
/* get powerdown reset */
ret = reset_get_by_name(dev, "powerdown", &plat->powerdown_ctl);
/**
* struct regmap - a way of accessing hardware/bus registers
*
- * @base: Base address of register map
* @range_count: Number of ranges available within the map
- * @range: Pointer to the list of ranges, allocated if @range_count > 1
- * @base_range: If @range_count is <= 1, @range points here
+ * @ranges: Array of ranges
*/
struct regmap {
- phys_addr_t base;
int range_count;
- struct regmap_range *range, base_range;
+ struct regmap_range ranges[0];
};
/*
map = syscon_get_regmap(dev);
ut_assertok_ptr(map);
ut_asserteq(1, map->range_count);
- ut_asserteq(0x10, map->base);
- ut_asserteq(0x10, map->range->start);
- ut_asserteq(4, map->range->size);
- ut_asserteq_ptr(&map->base_range, map->range);
+ ut_asserteq(0x10, map->ranges[0].start);
+ ut_asserteq(4, map->ranges[0].size);
ut_asserteq(0x10, map_to_sysmem(regmap_get_range(map, 0)));
ut_assertok(uclass_get_device(UCLASS_SYSCON, 1, &dev));
map = syscon_get_regmap(dev);
ut_assertok_ptr(map);
ut_asserteq(4, map->range_count);
- ut_asserteq(0x20, map->base);
- ut_assert(&map->base_range != map->range);
+ ut_asserteq(0x20, map->ranges[0].start);
for (i = 0; i < 4; i++) {
const unsigned long addr = 0x20 + 8 * i;
- ut_asserteq(addr, map->range[i].start);
- ut_asserteq(5 + i, map->range[i].size);
+ ut_asserteq(addr, map->ranges[i].start);
+ ut_asserteq(5 + i, map->ranges[i].size);
ut_asserteq(addr, map_to_sysmem(regmap_get_range(map, i)));
}