board: ge: bx50v3: Fix to meet LVDS display power on timing

On a reset/reboot, the display power needs to be off for atleast 500ms
before turning it back on. So add a delay to the boot process to meet
the display timing requirement.

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>

diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index dcf51dd7d09599648119140908c656aad9f608b3..ff8f4d7b972e842c6990afce8aa6fd95a4056953 100644 (file)
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -476,6 +476,13 @@ static void setup_display_bx50v3(void)
        struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
        struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
 
+       /* When a reset/reboot is performed the display power needs to be turned
+        * off for atleast 500ms. The boot time is ~300ms, we need to wait for
+        * an additional 200ms here. Unfortunately we use external PMIC for
+        * doing the reset, so can not differentiate between POR vs soft reset
+        */
+       mdelay(200);
+
        /* IPU1 DI0 clock is 480/7 = 68.5 MHz */
        setbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV);