]> git.sur5r.net Git - u-boot/commitdiff
spi: ti_qspi: Use DMA to read from qspi flash
authorVignesh R <vigneshr@ti.com>
Mon, 17 Aug 2015 09:50:13 +0000 (15:20 +0530)
committerJagan Teki <jteki@openedev.com>
Mon, 17 Aug 2015 17:59:15 +0000 (23:29 +0530)
ti_qspi uses memory map mode for faster read. Enabling DMA will increase
read speed by 3x @48MHz on DRA74 EVM.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
drivers/spi/ti_qspi.c

index af40ec864f0e3e5afa77f1815b9e81cdc1b0206d..bd63db8a2acc52ffc26a3da283c6cf3bcb6e3e07 100644 (file)
@@ -13,6 +13,8 @@
 #include <spi.h>
 #include <asm/gpio.h>
 #include <asm/omap_gpio.h>
+#include <asm/omap_common.h>
+#include <asm/ti-common/ti-edma3.h>
 
 /* ti qpsi register bit masks */
 #define QSPI_TIMEOUT                    2000000
@@ -347,3 +349,26 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
 
        return 0;
 }
+
+/* TODO: control from sf layer to here through dm-spi */
+#ifdef CONFIG_TI_EDMA3
+void spi_flash_copy_mmap(void *data, void *offset, size_t len)
+{
+       unsigned int                    addr = (unsigned int) (data);
+       unsigned int                    edma_slot_num = 1;
+
+       /* Invalidate the area, so no writeback into the RAM races with DMA */
+       invalidate_dcache_range(addr, addr + roundup(len, ARCH_DMA_MINALIGN));
+
+       /* enable edma3 clocks */
+       enable_edma3_clocks();
+
+       /* Call edma3 api to do actual DMA transfer     */
+       edma3_transfer(EDMA3_BASE, edma_slot_num, data, offset, len);
+
+       /* disable edma3 clocks */
+       disable_edma3_clocks();
+
+       *((unsigned int *)offset) += len;
+}
+#endif