#include <asm/arch/hardware.h>
#include <asm/io.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/* offsets from PLL controller base */
#define PLLC_PLLCTL 0x100
#define PLLC_PLLM 0x110
#endif
#endif /* !CONFIG_SOC_DA8XX */
+int set_cpu_clk_info(void)
+{
+#ifdef CONFIG_SOC_DA8XX
+ gd->bd->bi_arm_freq = clk_get(DAVINCI_ARM_CLKID) / 1000000;
+ /* DDR PHY uses an x2 input clock */
+ gd->bd->bi_ddr_freq = clk_get(0x10001) / 1000000;
+#else
+
+ unsigned int pllbase = DAVINCI_PLL_CNTRL0_BASE;
+#if defined(CONFIG_SOC_DM365)
+ pllbase = DAVINCI_PLL_CNTRL1_BASE;
+#endif
+ gd->bd->bi_arm_freq = pll_sysclk_mhz(pllbase, ARM_PLLDIV);
+
+#ifdef DSP_PLLDIV
+ gd->bd->bi_dsp_freq =
+ pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, DSP_PLLDIV);
+#else
+ gd->bd->bi_dsp_freq = 0;
+#endif
+
+ pllbase = DAVINCI_PLL_CNTRL1_BASE;
+#if defined(CONFIG_SOC_DM365)
+ pllbase = DAVINCI_PLL_CNTRL0_BASE;
+#endif
+ gd->bd->bi_ddr_freq = pll_sysclk_mhz(pllbase, DDR_PLLDIV) / 2;
+#endif
+ return 0;
+}
+
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
unsigned long bi_ip_addr; /* IP Address */
ulong bi_arch_number; /* unique id for this board */
ulong bi_boot_params; /* where this board expects params */
+ unsigned long bi_arm_freq; /* arm frequency */
+ unsigned long bi_dsp_freq; /* dsp core frequency */
+ unsigned long bi_ddr_freq; /* ddr frequency */
struct /* RAM configuration */
{
ulong start;
debug("monitor flash len: %08lX\n", monitor_flash_len);
board_init(); /* Setup chipselects */
-
+ /*
+ * TODO: printing of the clock inforamtion of the board is now
+ * implemented as part of bdinfo command. Currently only support for
+ * davinci SOC's is added. Remove this check once all the board
+ * implement this.
+ */
+#ifdef CONFIG_CLOCKS
+ set_cpu_clk_info(); /* Setup clock information */
+#endif
#ifdef CONFIG_SERIAL_MULTI
serial_initialize();
#endif
print_num("irq_sp", gd->irq_sp); /* irq stack pointer */
print_num("sp start ", gd->start_addr_sp);
print_num("FB base ", gd->fb_base);
+ /*
+ * TODO: Currently only support for davinci SOC's is added.
+ * Remove this check once all the board implement this.
+ */
+#ifdef CONFIG_CLOCKS
+ printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq);
+ printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq);
+ printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq);
+#endif
return 0;
}
extern ulong monitor_flash_len;
int mac_read_from_eeprom(void);
extern u8 _binary_dt_dtb_start[]; /* embedded device tree blob */
+int set_cpu_clk_info(void);
/*
* Called when console output is requested before the console is available.
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVES
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
#ifdef CONFIG_MMC
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_EXT2
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_SETGETDCR
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
#ifndef CONFIG_DRIVER_TI_EMAC
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_DHCP
#define CONFIG_CMD_SAVES
#define CONFIG_CMD_MEMORY
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
#ifndef CONFIG_DRIVER_TI_EMAC
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVES
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
#ifdef CONFIG_MMC
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVES
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
#ifdef CONFIG_NAND_DAVINCI
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS
#define CONFIG_CMD_PING
#define CONFIG_CMD_SAVES
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
#ifdef CONFIG_MMC
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_NAND
#endif
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_CMD_NAND
#endif
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_CMD_SAVES
#define CONFIG_CMD_EEPROM
#undef CONFIG_CMD_BDI
+
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_SETGETDCR
#ifdef CONFIG_SYS_USE_NAND
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#error "Either CONFIG_SYS_USE_NAND or CONFIG_SYS_USE_NOR _MUST_ be defined !!!"
#endif
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_I2C
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
#ifndef CONFIG_DRIVER_TI_EMAC
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_DHCP
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_CACHE
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
#ifndef CONFIG_DRIVER_TI_EMAC
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_DHCP
#define CONFIG_CMD_SAVES
#define CONFIG_CMD_MEMORY
+#ifdef CONFIG_CMD_BDI
+#define CONFIG_CLOCKS
+#endif
+
#ifdef CONFIG_SYS_USE_NAND
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS