]> git.sur5r.net Git - u-boot/commitdiff
watchdog: Introduce watchdog driver for Intel Tangier
authorFelipe Balbi <felipe.balbi@linux.intel.com>
Wed, 5 Jul 2017 17:33:20 +0000 (20:33 +0300)
committerBin Meng <bmeng.cn@gmail.com>
Sun, 30 Jul 2017 02:30:25 +0000 (10:30 +0800)
Add watchdog driver for Intel Tangier based platforms.

Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
drivers/watchdog/Kconfig
drivers/watchdog/Makefile
drivers/watchdog/tangier_wdt.c [new file with mode: 0644]

index d360a17d4d84e32f3f6b10b701fac65ede7d9b71..fc46b6774d57a0ab983676f3af6721457ceb8606 100644 (file)
@@ -19,7 +19,16 @@ config OMAP_WATCHDOG
        default y if AM33XX
        help
          Say Y here to enable the OMAP3+ watchdog driver.
-       
+
+config TANGIER_WATCHDOG
+       bool "Intel Tangier watchdog"
+       depends on INTEL_MID
+       select HW_WATCHDOG
+       help
+         This enables support for watchdog controller available on
+         Intel Tangier SoC. If you're using a board with Intel Tangier
+         SoC, say Y here.
+
 config ULP_WATCHDOG
        bool "i.MX7ULP watchdog"
        help
index 3230cbb2ad8e6dfe8fcb4bd55cddc30e2c2138c9..ab6a6b79e1d7c15630dc6025bef8c2b63a56eab8 100644 (file)
@@ -14,6 +14,7 @@ obj-$(CONFIG_S5P)               += s5p_wdt.o
 obj-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
 obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
 obj-$(CONFIG_DESIGNWARE_WATCHDOG) += designware_wdt.o
+obj-$(CONFIG_TANGIER_WATCHDOG) += tangier_wdt.o
 obj-$(CONFIG_ULP_WATCHDOG) += ulp_wdog.o
 obj-$(CONFIG_WDT) += wdt-uclass.o
 obj-$(CONFIG_WDT_SANDBOX) += sandbox_wdt.o
diff --git a/drivers/watchdog/tangier_wdt.c b/drivers/watchdog/tangier_wdt.c
new file mode 100644 (file)
index 0000000..9cf4baf
--- /dev/null
@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2017 Intel Corporation
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+#include <common.h>
+#include <watchdog.h>
+#include <asm/scu.h>
+
+/* Hardware timeout in seconds */
+#define WDT_PRETIMEOUT         15
+#define WDT_TIMEOUT_MIN                (1 + WDT_PRETIMEOUT)
+#define WDT_TIMEOUT_MAX                170
+#define WDT_DEFAULT_TIMEOUT    90
+
+#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
+#define WATCHDOG_HEARTBEAT 60000
+#else
+#define WATCHDOG_HEARTBEAT CONFIG_WATCHDOG_TIMEOUT_MSECS
+#endif
+
+enum {
+       SCU_WATCHDOG_START                      = 0,
+       SCU_WATCHDOG_STOP                       = 1,
+       SCU_WATCHDOG_KEEPALIVE                  = 2,
+       SCU_WATCHDOG_SET_ACTION_ON_TIMEOUT      = 3,
+};
+
+void hw_watchdog_reset(void)
+{
+       static unsigned long last;
+       unsigned long now;
+
+       if (gd->timer)
+               now = timer_get_us();
+       else
+               now = rdtsc() / 1000;
+
+       /* Do not flood SCU */
+       if (last > now)
+               last = 0;
+
+       if (unlikely((now - last) > (WDT_PRETIMEOUT / 2) * 1000000)) {
+               last = now;
+               scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_KEEPALIVE);
+       }
+}
+
+int hw_watchdog_disable(void)
+{
+       return scu_ipc_simple_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_STOP);
+}
+
+void hw_watchdog_init(void)
+{
+       u32 timeout = WATCHDOG_HEARTBEAT / 1000;
+       int in_size;
+       struct ipc_wd_start {
+               u32 pretimeout;
+               u32 timeout;
+       } ipc_wd_start = { timeout - WDT_PRETIMEOUT, timeout };
+
+       /*
+        * SCU expects the input size for watchdog IPC
+        * to be based on 4 bytes
+        */
+       in_size = DIV_ROUND_UP(sizeof(ipc_wd_start), 4);
+
+       scu_ipc_command(IPCMSG_WATCHDOG_TIMER, SCU_WATCHDOG_START,
+                       (u32 *)&ipc_wd_start, in_size, NULL, 0);
+}