]> git.sur5r.net Git - u-boot/commitdiff
Merge tag 'xilinx-for-v2018.01-rc2-v2' of git://www.denx.de/git/u-boot-microblaze
authorTom Rini <trini@konsulko.com>
Mon, 18 Dec 2017 17:23:27 +0000 (12:23 -0500)
committerTom Rini <trini@konsulko.com>
Mon, 18 Dec 2017 17:23:27 +0000 (12:23 -0500)
Xilinx changes for v2018.01-rc2-v2

fpga:
- Enable loading bitstream via fit image for !xilinx platforms

zynq:
- Fix SPL SD boot mode

zynqmp:
- Not not reset in panic
- Do not use simple allocator because of fat changes
- Various dt chagnes
- modeboot variable setup
- Fix fpga loading on automotive devices
- Fix coverity issues

test:
- Fix env test for !hush case - Stephen's patch

44 files changed:
arch/arm/Kconfig
arch/arm/dts/zynqmp-ep108.dts
arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
arch/arm/dts/zynqmp-zcu102-revA.dts
arch/arm/dts/zynqmp.dtsi
arch/arm/include/asm/arch-zynqmp/sys_proto.h
board/xilinx/zynqmp/zynqmp.c
common/bootm.c
common/image.c
configs/syzygy_hub_defconfig
configs/topic_miami_defconfig
configs/topic_miamilite_defconfig
configs/topic_miamiplus_defconfig
configs/xilinx_zynqmp_ep_defconfig
configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig
configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig
configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig
configs/xilinx_zynqmp_zcu102_rev1_0_defconfig
configs/xilinx_zynqmp_zcu102_revA_defconfig
configs/xilinx_zynqmp_zcu102_revB_defconfig
configs/zynq_cc108_defconfig
configs/zynq_cse_qspi_defconfig
configs/zynq_microzed_defconfig
configs/zynq_picozed_defconfig
configs/zynq_z_turn_defconfig
configs/zynq_zc702_defconfig
configs/zynq_zc706_defconfig
configs/zynq_zc770_xm010_defconfig
configs/zynq_zc770_xm011_defconfig
configs/zynq_zc770_xm012_defconfig
configs/zynq_zc770_xm013_defconfig
configs/zynq_zed_defconfig
configs/zynq_zybo_defconfig
drivers/fpga/fpga.c
drivers/fpga/xilinx.c
include/configs/xilinx_zynqmp.h
include/configs/zynq-common.h
include/fpga.h
test/py/tests/test_env.py
tools/zynqmpimage.c

index 73909952d0e692df5944b72ba9aa4d4deedf8842..f2c35e32c64948bdc3e8d030658aab3943aaa1de 100644 (file)
@@ -773,7 +773,7 @@ config ARCH_ZYNQMP
        select SUPPORT_SPL
        select CLK
        select SPL_BOARD_INIT if SPL
-       select SPL_CLK
+       select SPL_CLK if SPL
        select DM_USB if USB
        imply FAT_WRITE
 
index b0096f14b4445d531ef2f6eb134b2ea44a80fa05..a16ffdc3f0cee117dd193f71d9e3ef840535c6c5 100644 (file)
@@ -65,7 +65,7 @@
        status = "okay";
        clock-frequency = <400000>;
        eeprom@54 {
-               compatible = "at,24c64";
+               compatible = "atmel,24c64";
                reg = <0x54>;
        };
 };
@@ -74,7 +74,7 @@
        status = "okay";
        clock-frequency = <400000>;
        eeprom@55 {
-               compatible = "at,24c64";
+               compatible = "atmel,24c64";
                reg = <0x55>;
        };
 };
index 1f3c30277a41c158577f50f2720e199529d09aba..04d82c4d2ec96160548a01824153d6f3d822d5a4 100644 (file)
 /* fpd_dma clk 667MHz, lpd_dma 500MHz */
 &fpd_dma_chan1 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
-       xlnx,overfetch; /* for testing purpose */
-       xlnx,ratectrl = <0>; /* for testing purpose */
-       xlnx,src-issue = <31>;
 };
 
 &fpd_dma_chan2 {
        status = "okay";
-       xlnx,ratectrl = <100>; /* for testing purpose */
-       xlnx,src-issue = <4>; /* for testing purpose */
 };
 
 &fpd_dma_chan3 {
@@ -61,7 +55,6 @@
 
 &fpd_dma_chan4 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &fpd_dma_chan5 {
@@ -70,7 +63,6 @@
 
 &fpd_dma_chan6 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &fpd_dma_chan7 {
@@ -79,7 +71,6 @@
 
 &fpd_dma_chan8 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &gem3 {
index 87df36012ed7fd66de1dfaa560b5dc80b446c88a..7dfe960135a5d0d54590f04bb05b18ff098537c6 100644 (file)
 /* fpd_dma clk 667MHz, lpd_dma 500MHz */
 &fpd_dma_chan1 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
-       xlnx,overfetch; /* for testing purpose */
-       xlnx,ratectrl = <0>; /* for testing purpose */
-       xlnx,src-issue = <31>;
 };
 
 &fpd_dma_chan2 {
        status = "okay";
-       xlnx,ratectrl = <100>; /* for testing purpose */
-       xlnx,src-issue = <4>; /* for testing purpose */
 };
 
 &fpd_dma_chan3 {
@@ -71,7 +65,6 @@
 
 &fpd_dma_chan4 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &fpd_dma_chan5 {
@@ -80,7 +73,6 @@
 
 &fpd_dma_chan6 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &fpd_dma_chan7 {
@@ -89,7 +81,6 @@
 
 &fpd_dma_chan8 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &gem2 {
index 799b87a04c13ed11d6337eee34f8de1e36692ab0..648e3ba79939540b37120d4ed6b068d3917eb70b 100644 (file)
 /* fpd_dma clk 667MHz, lpd_dma 500MHz */
 &fpd_dma_chan1 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
-       xlnx,overfetch; /* for testing purpose */
-       xlnx,ratectrl = <0>; /* for testing purpose */
-       xlnx,src-issue = <31>;
 };
 
 &fpd_dma_chan2 {
        status = "okay";
-       xlnx,ratectrl = <100>; /* for testing purpose */
-       xlnx,src-issue = <4>; /* for testing purpose */
 };
 
 &fpd_dma_chan3 {
@@ -73,7 +67,6 @@
 
 &fpd_dma_chan4 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &fpd_dma_chan5 {
@@ -82,7 +75,6 @@
 
 &fpd_dma_chan6 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &fpd_dma_chan7 {
@@ -91,7 +83,6 @@
 
 &fpd_dma_chan8 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &lpd_dma_chan1 {
index 6de8296b735396ecaa4a4ebc366254292be7f5fe..f3020a57600a26ea6e398157f479827e56b8b872 100644 (file)
@@ -28,7 +28,7 @@
        };
 
        chosen {
-               bootargs = "earlycon=cdns,mmio,0xff000000,115200n8";
+               bootargs = "earlycon";
                stdout-path = "serial0:115200n8";
        };
 
 /* fpd_dma clk 667MHz, lpd_dma 500MHz */
 &fpd_dma_chan1 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
-       xlnx,overfetch; /* for testing purpose */
-       xlnx,ratectrl = <0>; /* for testing purpose */
-       xlnx,src-issue = <31>;
 };
 
 &fpd_dma_chan2 {
        status = "okay";
-       xlnx,ratectrl = <100>; /* for testing purpose */
-       xlnx,src-issue = <4>; /* for testing purpose */
 };
 
 &fpd_dma_chan3 {
@@ -59,7 +53,6 @@
 
 &fpd_dma_chan4 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &fpd_dma_chan5 {
@@ -68,7 +61,6 @@
 
 &fpd_dma_chan6 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &fpd_dma_chan7 {
@@ -77,7 +69,6 @@
 
 &fpd_dma_chan8 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &gem1 {
index a2128ebfd8c83f6d0fdf8318564a5092df60e4a2..64a883b96e3a182fa028052dac737024b09ef5a9 100644 (file)
@@ -14,6 +14,7 @@
 #include "zynqmp-clk.dtsi"
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
+#include <dt-bindings/phy/phy.h>
 
 / {
        model = "ZynqMP ZCU102 RevA";
 /* fpd_dma clk 667MHz, lpd_dma 500MHz */
 &fpd_dma_chan1 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
-       xlnx,overfetch; /* for testing purpose */
-       xlnx,ratectrl = <0>; /* for testing purpose */
-       xlnx,src-issue = <31>;
 };
 
 &fpd_dma_chan2 {
        status = "okay";
-       xlnx,ratectrl = <100>; /* for testing purpose */
-       xlnx,src-issue = <4>; /* for testing purpose */
 };
 
 &fpd_dma_chan3 {
@@ -98,7 +93,6 @@
 
 &fpd_dma_chan4 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &fpd_dma_chan5 {
 
 &fpd_dma_chan6 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &fpd_dma_chan7 {
 
 &fpd_dma_chan8 {
        status = "okay";
-       xlnx,include-sg; /* for testing purpose */
 };
 
 &gem3 {
@@ -884,6 +876,8 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751)  += max20751.o
        ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
        ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
        ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
+       phy-names = "sata-phy";
+       phys = <&lane3 PHY_TYPE_SATA 1 1 125000000>;
 };
 
 /* SD1 with level shifter */
@@ -895,6 +889,10 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751)  += max20751.o
        xlnx,mio_bank = <1>;
 };
 
+&serdes {
+       status = "okay";
+};
+
 &uart0 {
        status = "okay";
        pinctrl-names = "default";
@@ -917,6 +915,10 @@ drivers/hwmon/pmbus/Makefile:11:obj-$(CONFIG_SENSORS_MAX20751)  += max20751.o
 &dwc3_0 {
        status = "okay";
        dr_mode = "host";
+       snps,usb3_lpm_capable;
+       phy-names = "usb3-phy";
+       phys = <&lane2 PHY_TYPE_USB3 0 2 26000000>;
+       maximum-speed = "super-speed";
 };
 
 &watchdog0 {
index 247344fcbb867693c456dd12aa0a76da02dba11a..5bdab611645166d036f649975780175d0ad86ea2 100644 (file)
                method = "smc";
        };
 
-       firmware {
+       pmufw: firmware {
                compatible = "xlnx,zynqmp-pm";
                method = "smc";
                interrupt-parent = <&gic>;
                };
 
                qspi: spi@ff0f0000 {
+                       u-boot,dm-pre-reloc;
                        compatible = "xlnx,zynqmp-qspi-1.0";
                        status = "disabled";
                        clock-names = "ref_clk", "pclk";
index f256c7d4a996beecfd9db9eac9af60c37bc74eef..ad2856863363d0ada08d9abcfeeace3826847e14 100644 (file)
@@ -30,6 +30,7 @@ enum {
        TCM_SPLIT,
 };
 
+int zynq_board_read_rom_ethaddr(unsigned char *ethaddr);
 unsigned int zynqmp_get_silicon_version(void);
 
 void psu_init(void);
index f769db7e81b9836832a140e9364290f8c083795a..c198a4d9206349e4bfe8aba6108d0dc33868bac9 100644 (file)
@@ -260,10 +260,10 @@ int board_init(void)
        if (current_el() != 3) {
                static char version[ZYNQMP_VERSION_SIZE];
 
-               strncat(version, "xczu", 4);
+               strncat(version, "zu", 2);
                zynqmppl.name = strncat(version,
                                        zynqmp_get_silicon_idcode_name(),
-                                       ZYNQMP_VERSION_SIZE - 5);
+                                       ZYNQMP_VERSION_SIZE - 3);
                printf("Chip ID:\t%s\n", zynqmppl.name);
                fpga_init();
                fpga_add(fpga_xilinx, &zynqmppl);
@@ -277,10 +277,13 @@ int board_early_init_r(void)
 {
        u32 val;
 
+       if (current_el() != 3)
+               return 0;
+
        val = readl(&crlapb_base->timestamp_ref_ctrl);
        val &= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT;
 
-       if (current_el() == 3 && !val) {
+       if (!val) {
                val = readl(&crlapb_base->timestamp_ref_ctrl);
                val |= ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT;
                writel(val, &crlapb_base->timestamp_ref_ctrl);
@@ -343,13 +346,17 @@ int board_late_init(void)
        u8 bootmode;
        const char *mode;
        char *new_targets;
+       int ret;
 
        if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
                debug("Saved variables - Skipping\n");
                return 0;
        }
 
-       reg = readl(&crlapb_base->boot_mode);
+       ret = zynqmp_mmio_read((ulong)&crlapb_base->boot_mode, &reg);
+       if (ret)
+               return -EINVAL;
+
        if (reg >> BOOT_MODE_ALT_SHIFT)
                reg >>= BOOT_MODE_ALT_SHIFT;
 
@@ -360,23 +367,28 @@ int board_late_init(void)
        case USB_MODE:
                puts("USB_MODE\n");
                mode = "usb";
+               env_set("modeboot", "usb_dfu_spl");
                break;
        case JTAG_MODE:
                puts("JTAG_MODE\n");
                mode = "pxe dhcp";
+               env_set("modeboot", "jtagboot");
                break;
        case QSPI_MODE_24BIT:
        case QSPI_MODE_32BIT:
                mode = "qspi0";
                puts("QSPI_MODE\n");
+               env_set("modeboot", "qspiboot");
                break;
        case EMMC_MODE:
                puts("EMMC_MODE\n");
                mode = "mmc0";
+               env_set("modeboot", "emmcboot");
                break;
        case SD_MODE:
                puts("SD_MODE\n");
                mode = "mmc0";
+               env_set("modeboot", "sdboot");
                break;
        case SD1_LSHFT_MODE:
                puts("LVL_SHFT_");
@@ -385,13 +397,16 @@ int board_late_init(void)
                puts("SD_MODE1\n");
 #if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1)
                mode = "mmc1";
+               env_set("sdbootdev", "1");
 #else
                mode = "mmc0";
 #endif
+               env_set("modeboot", "sdboot");
                break;
        case NAND_MODE:
                puts("NAND_MODE\n");
                mode = "nand0";
+               env_set("modeboot", "nandboot");
                break;
        default:
                mode = "";
index 9493a306cd038d86b08575dba7cf97a1238933f6..adb12137c7b5ce6bbb69b39c64a7c022f7d7b3b0 100644 (file)
@@ -248,7 +248,7 @@ int bootm_find_images(int flag, int argc, char * const argv[])
 #endif
 
 #if IMAGE_ENABLE_FIT
-#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_XILINX)
+#if defined(CONFIG_FPGA)
        /* find bitstreams */
        ret = boot_get_fpga(argc, argv, &images, IH_ARCH_DEFAULT,
                            NULL, NULL);
index 4bcf6b3128a852ee24a4a83f8d4ee91bd70699ac..96c5f58e4c60a415abff9efe44cfdb09e3eaa565 100644 (file)
@@ -1215,7 +1215,7 @@ int boot_get_setup(bootm_headers_t *images, uint8_t arch,
 }
 
 #if IMAGE_ENABLE_FIT
-#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_XILINX)
+#if defined(CONFIG_FPGA)
 int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images,
                  uint8_t arch, const ulong *ld_start, ulong * const ld_len)
 {
@@ -1226,8 +1226,6 @@ int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images,
        const char *uname, *name;
        int err;
        int devnum = 0; /* TODO support multi fpga platforms */
-       const fpga_desc * const desc = fpga_get_desc(devnum);
-       xilinx_desc *desc_xilinx = desc->devdesc;
 
        /* Check to see if the images struct has a FIT configuration */
        if (!genimg_has_config(images)) {
@@ -1272,7 +1270,7 @@ int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images,
                        return fit_img_result;
                }
 
-               if (img_len >= desc_xilinx->size) {
+               if (!fpga_is_partial_data(devnum, img_len)) {
                        name = "full";
                        err = fpga_loadbitstream(devnum, (char *)img_data,
                                                 img_len, BIT_FULL);
index 1cc86b862c4a22556b7ec04be602e5519d61c896..8bdc4be67d70dd3a207b6a672f9763406b888101 100644 (file)
@@ -3,6 +3,7 @@ CONFIG_SYS_VENDOR="opalkelly"
 CONFIG_SYS_CONFIG_NAME="syzygy_hub"
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_DEFAULT_DEVICE_TREE="zynq-syzygy-hub"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
@@ -10,6 +11,7 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
index 38f2e4e5ccfdf70ba282c139be78be9b7053c9db..aabd705da0fb6368a599a65c9cb8e2f9f1be1852 100644 (file)
@@ -3,12 +3,14 @@ CONFIG_SYS_VENDOR="topic"
 CONFIG_SYS_CONFIG_NAME="topic_miami"
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miami/ps7_regs.txt"
 CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miami"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="zynq-uboot> "
 CONFIG_CMD_THOR_DOWNLOAD=y
index a1e98b7bc3f6c3f18069167c453358dcff874374..7228283b3c6bba2e8e667c121ee68250a06759c5 100644 (file)
@@ -3,12 +3,14 @@ CONFIG_SYS_VENDOR="topic"
 CONFIG_SYS_CONFIG_NAME="topic_miami"
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamilite/ps7_regs.txt"
 CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamilite"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="zynq-uboot> "
 CONFIG_CMD_THOR_DOWNLOAD=y
index b51107725a0c089b4172a20461dc62d60cbfddf1..d511a942838b6fde4eb8159b8ee40dcb1d6ee143 100644 (file)
@@ -3,12 +3,14 @@ CONFIG_SYS_VENDOR="topic"
 CONFIG_SYS_CONFIG_NAME="topic_miami"
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamiplus/ps7_regs.txt"
 CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamiplus"
 CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="zynq-uboot> "
 CONFIG_CMD_THOR_DOWNLOAD=y
index ee9528caec7151b30ae24343de6e09a42b02841d..1fc0fabd925693e54c37cffa6b8a00ea44a99804 100644 (file)
@@ -14,7 +14,6 @@ CONFIG_SPL_LOAD_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 CONFIG_FASTBOOT=y
@@ -25,6 +24,7 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_THOR_DOWNLOAD=y
 # CONFIG_CMD_EDITENV is not set
 # CONFIG_CMD_ENV_EXISTS is not set
+CONFIG_CMD_CLK=y
 CONFIG_CMD_DFU=y
 # CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPIO=y
@@ -57,6 +57,7 @@ CONFIG_FPGA_ZYNQMPPL=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_CADENCE=y
+CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
@@ -64,6 +65,10 @@ CONFIG_NAND=y
 CONFIG_NAND_ARASAN=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y
index beb24346baa9c6a7d5559f94d4b368c7385fdf4d..6914767187b9ce7ded2b21a1e040a460651c848b 100644 (file)
@@ -15,16 +15,20 @@ CONFIG_SPL_LOAD_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 CONFIG_FASTBOOT=y
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_THOR_DOWNLOAD=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
 CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -47,14 +51,17 @@ CONFIG_FPGA_ZYNQMPPL=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_CADENCE=y
+CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y
index 8c8201dfbb5c066884330ce441e3ca8148b5aff4..67a6d9ae9b60fcb4b671fd061679c4522be7c48f 100644 (file)
@@ -16,15 +16,19 @@ CONFIG_SPL_LOAD_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 CONFIG_FASTBOOT=y
 CONFIG_FASTBOOT_FLASH=y
 CONFIG_CMD_THOR_DOWNLOAD=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
 CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -46,6 +50,7 @@ CONFIG_FPGA_ZYNQMPPL=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_CADENCE=y
+CONFIG_MISC=y
 # CONFIG_MMC is not set
 CONFIG_DM_MMC=y
 CONFIG_NAND=y
index 34365c8cfe822dcb0421de56b533039b1b536a16..15b301dca1460577331e54757f398315b85ebb5d 100644 (file)
@@ -12,11 +12,15 @@ CONFIG_SPL_LOAD_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_TFTPPUT=y
@@ -35,9 +39,17 @@ CONFIG_FPGA_ZYNQMPPL=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_CADENCE=y
+CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y
index a9e7a879de42a8df1b61a4dcb9117c34f0a1fc1c..ac565ecf8f9cde7547e7e807cc2f34d25e3a4a1c 100644 (file)
@@ -13,11 +13,15 @@ CONFIG_SPL_LOAD_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_TFTPPUT=y
@@ -35,6 +39,7 @@ CONFIG_FPGA_ZYNQMPPL=y
 CONFIG_DM_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_CADENCE=y
+CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
index 158dc7ed8c6724cb920cd71dab1f27209dfe6184..c761d4948f5e5e2b77511e2cef472e1c027acaaa 100644 (file)
@@ -15,8 +15,9 @@ CONFIG_SPL_LOAD_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 CONFIG_FASTBOOT=y
 CONFIG_FASTBOOT_FLASH=y
@@ -24,8 +25,11 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_THOR_DOWNLOAD=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
 CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -49,14 +53,17 @@ CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
 CONFIG_DM_GPIO=y
 CONFIG_CMD_PCA953X=y
+CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y
index 01e956cbc9358bb6b28f11b2093b9dc2b8947e98..43b533fdb908ea6d75652eec85cd91fb60586164 100644 (file)
@@ -15,8 +15,9 @@ CONFIG_SPL_LOAD_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 CONFIG_FASTBOOT=y
 CONFIG_FASTBOOT_FLASH=y
@@ -24,8 +25,11 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_THOR_DOWNLOAD=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
 CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -49,14 +53,17 @@ CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
 CONFIG_DM_GPIO=y
 CONFIG_CMD_PCA953X=y
+CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y
index ab2f0a830a0cd4bb95e5d94ec823e399bf3bca60..c2d0ddbcf9de13147599875903af4fce260f6e9b 100644 (file)
@@ -15,8 +15,9 @@ CONFIG_SPL_LOAD_FIT=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SYS_PROMPT="ZynqMP> "
 CONFIG_FASTBOOT=y
 CONFIG_FASTBOOT_FLASH=y
@@ -24,8 +25,11 @@ CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_CMD_THOR_DOWNLOAD=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
 CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
+CONFIG_CMD_FPGA_LOADBP=y
+CONFIG_CMD_FPGA_LOADP=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -49,14 +53,17 @@ CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_ZYNQMPPL=y
 CONFIG_DM_GPIO=y
 CONFIG_CMD_PCA953X=y
+CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_ZYNQ_GEM=y
index fcf4635e3d176af8affc08123e745f569fb6b60c..bdba0d1cc9bae5ea34eb547c5cec1e0c5baaac12 100644 (file)
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_DEFAULT_DEVICE_TREE="zynq-cc108"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
@@ -8,6 +9,7 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
 CONFIG_CMD_BOOTZ=y
index 86c5d4452e7afad1e18796456a4f5e3d05b3f104..9659faefbf335f06add3736a9a3875967257a1c8 100644 (file)
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_SYS_CONFIG_NAME="zynq_cse"
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0xFFFC0000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 # CONFIG_ZYNQ_DDRC_INIT is not set
 CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single"
 CONFIG_DEBUG_UART=y
@@ -9,6 +10,7 @@ CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=-1
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_SYS_PROMPT="Zynq> "
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_CONSOLE is not set
index a713314343d8684bcb98b29e1bf9f1c8f56c5aee..fc21eb8f67a31b3f0270f14abda4d15ab312a365 100644 (file)
@@ -1,12 +1,14 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_DEFAULT_DEVICE_TREE="zynq-microzed"
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
index bbccfa5dcecf010da353b74bf60c6c17ba9b092d..f36e7bd849f43352845216a98ff3b385d9178799 100644 (file)
@@ -1,9 +1,11 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_DEFAULT_DEVICE_TREE="zynq-picozed"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
index 396c63f35c8b9046d313195c54758f1980bf58b3..c727b2acbf282c5974c2d340d1f3fa198067fcca 100644 (file)
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zturn-myir"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
@@ -8,6 +9,7 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
index ee6462f21aac680c80831d216b019b299c6f674b..0d0efc223dd4d3519b1e134fd92f801062928cc5 100644 (file)
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_SYS_CONFIG_NAME="zynq_zc70x"
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc702"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
@@ -9,6 +10,7 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
index 52999debc1150b42ab3f1234388fb2aa4f4ef151..4b186c9fffc6456182c66b2db403b2135c12a489 100644 (file)
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_SYS_CONFIG_NAME="zynq_zc70x"
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
@@ -9,6 +10,7 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
index bf334677c57f144b5dce4614512d0ea06f2e8751..897ca91e56067a51e4686ffd7f0c8a1a1f568b22 100644 (file)
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm010"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
@@ -9,6 +10,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM010"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
index 357b92b5fd0e5f5e72bd52384ced210a7933dc39..2b8a12ee690660ced8f654f4808c5c54facb5cc7 100644 (file)
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 # CONFIG_SPL_FAT_SUPPORT is not set
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm011"
 CONFIG_FIT=y
@@ -9,6 +10,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM011"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
index cce24b97a8ddb0c57f291d411bf94cc2f1693288..d53fe94db36b57e62e512a8c26a046c574fc5bb4 100644 (file)
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 # CONFIG_SPL_FAT_SUPPORT is not set
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm012"
 CONFIG_FIT=y
@@ -9,6 +10,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM012"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
index 869975c0df62d9afdba24f757ea5c523bfaa004f..e6445f735c570fc67f30427fa6002d192b46301a 100644 (file)
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 # CONFIG_SPL_FAT_SUPPORT is not set
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm013"
 CONFIG_FIT=y
@@ -9,6 +10,7 @@ CONFIG_FIT_VERBOSE=y
 CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM013"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
index d1d59e8e2f46739f4052c8042820e7f97cfcfcd3..c18f056debc4b144ea4afc503ea4c25849a662e2 100644 (file)
@@ -1,12 +1,14 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zed"
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
index 412646086fc6f40d6b190e3a16521edfd055b68e..21f8c08fd824da61e134db25532fdb3878508f1a 100644 (file)
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_SYS_CONFIG_NAME="zynq_zybo"
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zybo"
 CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
@@ -9,6 +10,7 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL=y
+CONFIG_SPL_STACK_R=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Zynq> "
index e0fb1b4e783b7527bf43185cf7c053fc7c3fa0d9..6aead27f16265e5a3f66973ec5343da1a156baeb 100644 (file)
@@ -170,6 +170,15 @@ int fpga_add(fpga_type devtype, void *desc)
        return devnum;
 }
 
+/*
+ * Return 1 if the fpga data is partial.
+ * This is only required for fpga drivers that support bitstream_type.
+ */
+int __weak fpga_is_partial_data(int devnum, size_t img_len)
+{
+       return 0;
+}
+
 /*
  * Convert bitstream data and load into the fpga
  */
index 941f30010a5437dccd3737960204ec4888ea4ebb..3c057609697fe51ef51c7037b663b17f3a2ff94a 100644 (file)
@@ -24,6 +24,19 @@ static int xilinx_validate(xilinx_desc *desc, char *fn);
 
 /* ------------------------------------------------------------------------- */
 
+int fpga_is_partial_data(int devnum, size_t img_len)
+{
+       const fpga_desc * const desc = fpga_get_desc(devnum);
+       xilinx_desc *desc_xilinx = desc->devdesc;
+
+       /* Check datasize against FPGA size */
+       if (img_len >= desc_xilinx->size)
+               return 0;
+
+       /* datasize is smaller, must be partial data */
+       return 1;
+}
+
 int fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
                       bitstream_type bstype)
 {
index 57fee6a4c8a562dc3c071614d39a4877f8471061..9997fd095982fed4a58d7b25870e5b8c081c20ab 100644 (file)
 #define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_CMDLINE_EDITING
+#define CONFIG_PANIC_HANG
 #define CONFIG_SYS_MAXARGS             64
 
 /* Ethernet driver */
 
 #define CONFIG_SPL_FRAMEWORK
 
+#if defined(CONFIG_SPL_SPI_FLASH_SUPPORT)
+# define CONFIG_SPL_SPI_LOAD
+# define CONFIG_SYS_SPI_KERNEL_OFFS    0x80000
+# define CONFIG_SYS_SPI_ARGS_OFFS      0xa0000
+# define CONFIG_SYS_SPI_ARGS_SIZE      0xa0000
+
+# define CONFIG_SYS_SPI_U_BOOT_OFFS    0x170000
+#endif
+
 /* u-boot is like dtb */
 #define CONFIG_SPL_FS_LOAD_ARGS_NAME   "u-boot.bin"
 #define CONFIG_SYS_SPL_ARGS_ADDR       0x8000000
 # define CONFIG_SPL_ENV_SUPPORT
 # define CONFIG_SPL_HASH_SUPPORT
 # define CONFIG_ENV_MAX_ENTRIES        10
+#endif
 
-# define CONFIG_SYS_SPL_MALLOC_START   0x20000000
-# define CONFIG_SYS_SPL_MALLOC_SIZE    0x100000
+#define CONFIG_SYS_SPL_MALLOC_START    0x20000000
+#define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000
 
 #ifdef CONFIG_SPL_SYS_MALLOC_SIMPLE
 # error "Disable CONFIG_SPL_SYS_MALLOC_SIMPLE. Full malloc needs to be used"
 #endif
-#endif
 
 #define CONFIG_BOARD_EARLY_INIT_F
 
index 7247c903075573a45f674dea8a4d5404e4b9544b..b10cb3f572204131e2af35d3b322eb917504036d 100644 (file)
 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
 #define CONFIG_SPL_MAX_SIZE    0x30000
 
-/* The highest 64k OCM address */
-#define OCM_HIGH_ADDR  0xffff0000
-
 /* On the top of OCM space */
-#define CONFIG_SYS_SPL_MALLOC_START    OCM_HIGH_ADDR
-#define CONFIG_SYS_SPL_MALLOC_SIZE     0x2000
+#define CONFIG_SYS_SPL_MALLOC_START    CONFIG_SPL_STACK_R_ADDR
+#define CONFIG_SYS_SPL_MALLOC_SIZE     0x2000000
 
 /*
  * SPL stack position - and stack goes down
index d768fb14171af5744b799e9e81f65e03ca95e6ab..4d6da790b76a1a6a29f276cf8eaef32550c5c371 100644 (file)
@@ -54,6 +54,7 @@ void fpga_init(void);
 int fpga_add(fpga_type devtype, void *desc);
 int fpga_count(void);
 const fpga_desc *const fpga_get_desc(int devnum);
+int fpga_is_partial_data(int devnum, size_t img_len);
 int fpga_load(int devnum, const void *buf, size_t bsize,
              bitstream_type bstype);
 int fpga_fsload(int devnum, const void *buf, size_t size,
index b7f960c755fe1d3ab581960f3156371be0cc97b8..f8694017b42a091c4c94bfed9713bfe28405d881 100644 (file)
@@ -125,7 +125,16 @@ def set_var(state_test_env, var, value):
         Nothing.
     """
 
-    state_test_env.u_boot_console.run_command('setenv %s "%s"' % (var, value))
+    bc = state_test_env.u_boot_console.config.buildconfig
+    if bc.get('config_hush_parser', None):
+        quote = '"'
+    else:
+        quote = ''
+        if ' ' in value:
+            pytest.skip('Space in variable value on non-Hush shell')
+
+    state_test_env.u_boot_console.run_command(
+        'setenv %s %s%s%s' % (var, quote, value, quote))
     state_test_env.env[var] = value
 
 def validate_empty(state_test_env, var):
index 9667b11b2f8a5a235c352255b57aeee37b570718..f48ac6dbe5056de5b36a1c99695908bfdeeadb41 100644 (file)
@@ -245,16 +245,38 @@ static int zynqmpimage_check_image_types(uint8_t type)
        return EXIT_FAILURE;
 }
 
-static int fsize(FILE *fp)
+static uint32_t fsize(FILE *fp)
 {
-       int size;
-       int origin = ftell(fp);
+       int size, ret, origin;
+
+       origin = ftell(fp);
+       if (origin < 0) {
+               fprintf(stderr, "Incorrect file size\n");
+               fclose(fp);
+               exit(2);
+       }
+
+       ret = fseek(fp, 0L, SEEK_END);
+       if (ret) {
+               fprintf(stderr, "Incorrect file SEEK_END\n");
+               fclose(fp);
+               exit(3);
+       }
 
-       fseek(fp, 0L, SEEK_END);
        size = ftell(fp);
+       if (size < 0) {
+               fprintf(stderr, "Incorrect file size\n");
+               fclose(fp);
+               exit(4);
+       }
 
        /* going back */
-       fseek(fp, origin, SEEK_SET);
+       ret = fseek(fp, origin, SEEK_SET);
+       if (ret) {
+               fprintf(stderr, "Incorrect file SEEK_SET to %d\n", origin);
+               fclose(fp);
+               exit(3);
+       }
 
        return size;
 }