CONFIG_${ARCH} is defined by Kconfig.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CROSS_COMPILE := $(ARC_CROSS_COMPILE)
endif
-PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -DCONFIG_ARC -gdwarf-2
+PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2
# Needed for relocation
LDFLAGS_FINAL += -pie
# Support generic board on ARM
__HAVE_ARCH_GENERIC_BOARD := y
-PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
+PLATFORM_CPPFLAGS += -D__ARM__
# Choose between ARM/Thumb instruction sets
ifeq ($(CONFIG_SYS_THUMB_BUILD),y)
CROSS_COMPILE := avr32-linux-
endif
-PLATFORM_CPPFLAGS += -DCONFIG_AVR32
CONFIG_STANDALONE_LOAD_ADDR ?= 0x00000000
PLATFORM_RELFLAGS += -ffixed-r5 -fPIC -mno-init-got -mrelax
CONFIG_BFIN_BOOT_MODE := $(strip $(CONFIG_BFIN_BOOT_MODE:"%"=%))
PLATFORM_RELFLAGS += -ffixed-P3 -fomit-frame-pointer -mno-fdpic
-PLATFORM_CPPFLAGS += -DCONFIG_BLACKFIN
LDFLAGS_FINAL += --gc-sections
LDFLAGS += -m elf32bfin
CONFIG_STANDALONE_LOAD_ADDR ?= 0x20000
-PLATFORM_CPPFLAGS += -DCONFIG_M68K -D__M68K__
+PLATFORM_CPPFLAGS += -D__M68K__
PLATFORM_LDFLAGS += -n
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
# Default to EB if no endianess is configured
ENDIANNESS ?= -EB
-PLATFORM_CPPFLAGS += -DCONFIG_MIPS -D__MIPS__
+PLATFORM_CPPFLAGS += -D__MIPS__
__HAVE_ARCH_GENERIC_BOARD := y
PLATFORM_RELFLAGS += -fno-strict-aliasing -fno-common -mrelax
PLATFORM_RELFLAGS += -gdwarf-2
-PLATFORM_CPPFLAGS += -DCONFIG_NDS32 -D__nds32__ -G0 -ffixed-10 -fpie
+PLATFORM_CPPFLAGS += -D__nds32__ -G0 -ffixed-10 -fpie
LDFLAGS_u-boot = --gc-sections --relax
CONFIG_STANDALONE_LOAD_ADDR ?= 0x02000000
-PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__
+PLATFORM_CPPFLAGS += -D__NIOS2__
PLATFORM_CPPFLAGS += -G0
LDFLAGS_FINAL += --gc-sections
# r10 used for global object pointer, already set in OR32 GCC but just to be
# clear
-PLATFORM_CPPFLAGS += -DCONFIG_OPENRISC -D__OR1K__ -ffixed-r10
+PLATFORM_CPPFLAGS += -D__OR1K__ -ffixed-r10
CONFIG_STANDALONE_LOAD_ADDR ?= 0x40000
LDFLAGS_FINAL += --gc-sections
PLATFORM_RELFLAGS += -fpic -mrelocatable -ffunction-sections -fdata-sections \
-meabi
-PLATFORM_CPPFLAGS += -DCONFIG_PPC -D__powerpc__ -ffixed-r2
+PLATFORM_CPPFLAGS += -D__powerpc__ -ffixed-r2
PLATFORM_LDFLAGS += -n
# Support generic board on PPC
# Copyright (c) 2011 The Chromium OS Authors.
# SPDX-License-Identifier: GPL-2.0+
-PLATFORM_CPPFLAGS += -DCONFIG_SANDBOX -D__SANDBOX__ -U_FORTIFY_SOURCE
+PLATFORM_CPPFLAGS += -D__SANDBOX__ -U_FORTIFY_SOURCE
PLATFORM_CPPFLAGS += -DCONFIG_ARCH_MAP_SYSMEM -DCONFIG_SYS_GENERIC_BOARD
PLATFORM_LIBS += -lrt
CONFIG_STANDALONE_LOAD_ADDR ?= 0x00000000 -L $(gcclibdir) \
-T $(srctree)/examples/standalone/sparc.lds
-PLATFORM_CPPFLAGS += -DCONFIG_SPARC -D__sparc__
+PLATFORM_CPPFLAGS += -D__sparc__
CROSS_COMPILE ?= i386-linux-
-PLATFORM_CPPFLAGS += -DCONFIG_X86 -D__I386__ -Werror
+PLATFORM_CPPFLAGS += -D__I386__ -Werror
# DO NOT MODIFY THE FOLLOWING UNLESS YOU REALLY KNOW WHAT YOU ARE DOING!
LDPPFLAGS += -DRESET_SEG_START=0xffff0000
#include "../board/xilinx/microblaze-generic/xparameters.h"
/* MicroBlaze CPU */
-#define CONFIG_MICROBLAZE 1
#define MICROBLAZE_V5 1
/* Open Firmware DTS */