#include <common.h>
#include <pci.h>
-#include <ssi.h>
#include <netdev.h>
+#include <ds1722.h>
#include <asm/io.h>
#include <asm/pci.h>
#include <asm/ic/sc520.h>
+#include <asm/ic/pci.h>
+#include <asm/ic/ssi.h>
DECLARE_GLOBAL_DATA_PTR;
};
static int next_irq_index=0;
- char tmp_pin;
+ uchar tmp_pin;
int pin;
pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &tmp_pin);
}
}
+void spi_eeprom_probe(int x)
+{
+}
+
+int spi_eeprom_read(int x, int offset, uchar *buffer, int len)
+{
+ return 0;
+}
+
+int spi_eeprom_write(int x, int offset, uchar *buffer, int len)
+{
+ return 0;
+}
+
+void mw_eeprom_probe(int x)
+{
+}
+
+int mw_eeprom_read(int x, int offset, uchar *buffer, int len)
+{
+ return 0;
+}
+
+int mw_eeprom_write(int x, int offset, uchar *buffer, int len)
+{
+ return 0;
+}
void spi_init_f(void)
{
#define CONFIG_X86 1 /* This is a X86 CPU */
#define CONFIG_SYS_SC520 1 /* Include support for AMD SC520 */
+#define CONFIG_SYS_SC520_SSI
#define CONFIG_SYS_SDRAM_PRECHARGE_DELAY 6 /* 6T */
#define CONFIG_SYS_SDRAM_REFRESH_RATE 78 /* 7.8uS (choices are 7.8, 15.6, 31.2 or 62.5uS) */
#define CONFIG_SYS_PCMCIA_CIS_WIN_SIZE 0x00100000
#define CONFIG_SYS_PCMCIA_IO_WIN 0xe000
#define CONFIG_SYS_PCMCIA_IO_WIN_SIZE 16
+#define CONFIG_PCMCIA_SLOT_A /* TODO: Check this */
/************************************************************
* DISK Partition support