powerpc/e6500: Move QCSP registers for QMan v3

The QCSP registers are expanded and moved from offset 0 to offset 0x1000
for SoCs with QMan v3.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 5e40f26072e9d66f24773fde59668d2a1ac1bbd2..005a045ab5280725f36a6a467d92d2c9c8532998 100644 (file)
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2549,13 +2549,16 @@ typedef struct ccsr_sec {
 #endif
 
 typedef struct ccsr_qman {
+#ifdef CONFIG_SYS_FSL_QMAN_V3
+       u8      res0[0x200];
+#else
        struct {
                u32     qcsp_lio_cfg;   /* 0x0 - SW Portal n LIO cfg */
                u32     qcsp_io_cfg;    /* 0x4 - SW Portal n IO cfg */
                u32     res;
                u32     qcsp_dd_cfg;    /* 0xc - SW Portal n Dynamic Debug cfg */
        } qcsp[32];
-
+#endif
        /* Not actually reserved, but irrelevant to u-boot */
        u8      res[0xbf8 - 0x200];
        u32     ip_rev_1;
@@ -2580,6 +2583,14 @@ typedef struct ccsr_qman {
        u32     ci_rlm_cfg;     /* Initiator Read Latency Monitor Cfg */
        u32     ci_rlm_avg;     /* Initiator Read Latency Monitor Avg */
        u8      res7[0x2e8];
+#ifdef CONFIG_SYS_FSL_QMAN_V3
+       struct {
+               u32     qcsp_lio_cfg;   /* 0x0 - SW Portal n LIO cfg */
+               u32     qcsp_io_cfg;    /* 0x4 - SW Portal n IO cfg */
+               u32     res;
+               u32     qcsp_dd_cfg;    /* 0xc - SW Portal n Dynamic Debug cfg*/
+       } qcsp[50];
+#endif
 } ccsr_qman_t;
 
 typedef struct ccsr_bman {